ADP5033 Analog Devices, ADP5033 Datasheet - Page 4

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ADP5033

Manufacturer Part Number
ADP5033
Description
Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs
Manufacturer
Analog Devices
Datasheet

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ADP5033
BUCK1 AND BUCK2 SPECIFICATIONS
V
otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
OUTPUT CHARACTERISTICS
PSM CURRENT THRESHOLD
OPERATING SUPPLY CURRENT
SW CHARACTERISTICS
ACTIVE PULL-DOWN
OSCILLATOR FREQUENCY
1
LDO1 AND LDO2 SPECIFICATIONS
V
1 μF; T
Table 3.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
OUTPUT CHARACTERISTICS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
IN1
IN3
Input Voltage Range
Output Voltage Accuracy
Line Regulation
Load Regulation
PSM to PWM Operation
BUCK1 Only
BUCK2 Only
BUCK1 and BUCK2
SW On Resistance
Current Limit
Bias Current per LDO
Total System Input Current
Output Voltage Accuracy
Line Regulation
Load Regulation
= V
= (V
LDO1 or LDO2 Only
LDO1 and LDO2 Only
J
= −40°C to +125°C for minimum/maximum specifications, and T
IN2
OUT3
= 2.3 V to 5.5 V; T
+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V, V
1
3
2
J
= −40°C to +125°C for minimum/maximum specifications, and T
Symbol
V
∆V
(∆V
(∆V
(∆V
(∆V
I
I
I
I
R
R
R
R
I
R
f
PSM
IN
IN
IN
LIMIT1
SW
PFET
PFET
NFET
NFET
PDWN-B
IN1
OUT1
Symbol
V
I
I
∆V
∆V
(∆V
(∆V
(∆V
(∆V
VIN3BIAS
IN
, V
OUT1
OUT2
OUT1
OUT2
IN3
, I
OUT3
OUT4
IN2
OUT3
OUT4
OUT3
OUT4
/V
LIMIT2
, V
/V
/V
/V
/V
OUT1
IN4
/I
/V
/V
OUT1
OUT2
OUT1
OUT2
/V
/V
/V
/V
VIN4BIAS
OUT3
OUT4
OUT3
OUT4
OUT3
OUT4
, ∆V
)/∆V
)/∆V
)/∆I
)/∆I
,
)/∆V
)/∆V
)/∆I
)/∆I
OUT2
OUT1
OUT2
IN1
IN2
OUT3
OUT4
IN3
IN4
,
/V
,
,
,
OUT2
Test Conditions/Comments
I
I
I
Includes all current into VIN1, VIN2, VIN3, and VIN4
I
I
100 μA < I
I
I
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
Test Conditions/Comments
PWM mode, I
PWM mode; I
I
MODE = ground
I
other channels disabled
I
other channels disabled
I
Channel disabled
PWM mode
LDO channels disabled
PFET at VIN1 = 5 V
PFET at VIN1 = 3.6 V
NFET at VIN1 = 5 V
NFET at VIN1 = 3.6 V
PFET switch peak current limit
LOAD
LOAD1
LOAD2
LOAD1
Rev. A | Page 4 of 28
= I
= I
= I
= I
= I
= I
= I
OUT4
OUT4
OUT4
OUT4
OUT4
OUT4
OUT4
IN4
= 0 mA to 800 mA, PWM mode
= 0 mA, device not switching, all
= 0 mA, device not switching, all
= I
OUT3
= (V
= 0 μA
= 10 mA
= 300 mA
= 0 μA, all other channels disabled
= 0 μA, buck channels disabled
= 1 mA
= 1 mA to 300 mA
LOAD2
< 300 mA, 100 μA < I
OUT4
= 0 mA, device not switching,
LOAD1
LOAD1
A
= 25°C for typical specifications, unless otherwise noted.
+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V; C
= I
= I
LOAD2
LOAD2
= 0 mA to 800 mA
= 0 mA to 800 mA
OUT4
< 300 mA
A
= 25°C for typical specifications, unless
Min
2.3
−3
1100
2.5
Min
1.7
−3
−0.03
Typ
−0.05
−0.1
100
44
55
67
145
180
110
125
1350
75
3.0
Typ
10
60
165
53
74
0.001
Data Sheet
Max
5.5
+3
235
295
190
220
3.5
Max
5.5
30
100
245
+3
+0.03
0.003
IN
= C
Unit
V
%
%/V
%/A
mA
μA
μA
μA
mA
Ω
MHz
OUT
Unit
V
μA
μA
μA
μA
μA
%
%/V
%/mA
1
=

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