ADP5034 Analog Devices, ADP5034 Datasheet - Page 20

• Manufacturer Part Number: ADP5034
• Description: Dual 3 MHz, 1200mA Buck Regulator with Two 300 mA LDOs
• Manufacturer: Analog Devices

ADP5034
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
Capacitors with lower effective series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 7 μF and a
maximum of 40 μF.
The buck regulators require 10 μF output capacitors to guaran-
tee stability and response to rapid load variations and to transition
into and out of the PWM/PSM modes. A list of suggested capaci-
tors is shown in Table 9. In certain applications where one or
both buck regulator powers a processor, the operating state is
known because it is controlled by software. In this condition,
the processor can drive the MODE pin according to the operating
state; consequently, it is possible to reduce the output capacitor
from 10 μF to 4.7 μF because the regulator does not expect a
large load variation when working in PSM mode (see Figure 50).
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
V
ESR
I
CIN
RIPPLE
COUT
≥
I
=
LOAD
≤
8
×
V
I
(
MAX
RIPPLE
f
RIPPLE
I
SW
RIPPLE
)
×
C
V
OUT
OUT
(
≈
V
V
IN
(
2
IN
π
−
1.7V TO
×
V
2.3V TO
OUT
5.5V
f
5.5V
SW
Figure 50. Processor System Power Management with PSM/PWM Control
V
)
)
2
IN
×
L
OFF
OFF
OFF
×
C
0.1µF
4.7µF
C
AVIN
4.7µF
ON
ON
ON
C1
1µF
1µF
OUT
C2
C3
C4
AVIN
VIN1
VIN2
VIN3
VIN4
EN1
EN2
EN3
EN4
ADP5034
Rev. A | Page 20 of 28
EN1
EN2
EN3
EN4
HOUSEKEEPING
(ANALOG)
(DIGITAL)
BUCK1
BUCK2
MODE
MODE
LDO1
LDO2
AGND
To minimize supply noise, place the input capacitor as close as
possible to the VINx pin of the buck. As with the output
capacitor, a low ESR capacitor is recommended.
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 3 μF and a
maximum of 10 μF. A list of suggested capacitors is shown in
Table 9 and Table 10.
Table 9. Suggested 10 μF Capacitors
Vendor
Murata
TDK
Panasonic
Table 10. Suggested 4.7 μF Capacitors
Vendor
Murata
Taiyo Yuden
Panasonic
Table 11. Suggested 1.0 μF Capacitors
Vendor
Murata
TDK
Panasonic
Taiyo
Yuden
VOUT1
SW1
FB1
PGND1
MODE
VOUT2
SW2
FB2
PGND2
VOUT3
FB3
VOUT4
FB4
L2 1µH
L1 1µH
R2
R4
R6
R8
R1
R3
R5
R7
PWM
Type
X5R
X5R
X5R
X5R
Type
X5R
X5R
X5R
Type
X5R
X5R
X5R
PSM/PWM
C5
10µF
C6
10µF
C7
1µF
C8
1µF
V
1200mA
V
1200mA
V
300mA
V
300mA
OUT1
OUT2
OUT3
OUT4
Model
GRM188R60J475ME19D
JMK107BJ475
ECJ-0EB0J475M
Model
GRM155B30J105K
C1005JB0J105KT
ECJ0EB0J105K
LMK105BJ105MV-F
Model
GRM188R60J106
C1608JB0J106K
ECJ1VB0J106M
@
@
@
@
Case
Size
0402
0402
0402
0402
Data Sheet
Case
Size
0603
0603
0603
Case
Size
0402
0402
0402
Voltage
Rating (V)
6.3
6.3
6.3
10.0
Voltage
Rating
(V)
6.3
6.3
6.3
Voltage
Rating
(V)
6.3
6.3
6.3