ADP5041 Analog Devices, ADP5041 Datasheet - Page 26

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ADP5041

Manufacturer Part Number
ADP5041
Description
Micro PMU with 1.2 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset
Manufacturer
Analog Devices
Datasheet
ADP5041
THEORY OF OPERATION
POWER MANAGEMENT UNIT
The
combing one step-down (buck) dc-to-dc regulator, two low
dropout linear regulators (LDOs), and a supervisory circuit, with
watchdog, for processor control. The high switching frequency and
tiny 20-pin LFCSP package allow for a small power management
solution.
The regulators are activated by a logic level high applied to the
respective EN pin. The EN1 pin controls the buck regulator, the
EN2 pin controls LDO1, and the EN3 pin controls LDO2.
Other features available on this device are the MODE pin to
control the buck switching operation and a push-button reset
input.
The regulator output voltages and the reset threshold are set
through external resistor dividers.
MODE
PGND
AVIN
VIN1
EN1
EN2
EN3
SW
ADP5041
VDDA
OPMODE_FUSES
is a micro power management unit (micro PMU)
AND MODE
CONTROL
ADP5041
ENABLE
SEL
ANTISHOOT
THROUGH
DRIVER
I
LOW
CURRENT
PWM
COMP
LIMIT
AND
MODE
ENBK
ENLDO1
ENLDO2
VDDA
CONTROL
BUCK1
PWM/
GM ERROR
PSM
AMP
VIN2
UNDERVOLTAGE
SOFT START
OSCILLATOR
SHUTDOWN
LOCK OUT
THERMAL
SYSTEM
COMP
ENBK
PSM
Figure 101. Functional Block Diagram
CONTROL
LDO1
Rev. 0 | Page 26 of 40
85Ω
VOUT1 FB1
FB2 AGND VOUT2 VIN3
When a regulator is turned on, the output voltage ramp is
controlled through a soft start circuit to avoid a large inrush
current due to the discharged output capacitors.
The buck regulator can operate in forced PWM mode if the
MODE pin is at a logic high level. In forced PWM mode, the
switching frequency of the buck is always constant and does not
change with the load current. If the MODE pin is at a logic low
level, the switching regulator operates in auto PWM/PSM mode.
In this mode, the regulator operates at fixed PWM frequency
when the load current is above the power save current threshold.
When the load current falls below the power saving current
threshold, the regulator enters power saving mode, where the
switching occurs in bursts. The burst repetition rate is a
function of the current load and the output capacitor value.
This operating mode reduces the switching and quiescent
current losses.
VTHR
V
MR
REF
VDDA
VDDA
52kΩ
600Ω
DEBOUNCE
CONTROL
LDO2
ENLDO1
ENWD
GENERATOR
RESET
ENLDO2
WATCHDOG
DETECTOR
WDI
FB3
600Ω
Data Sheet
VOUT3
nRSTO

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