ADP5042  

Manufacturer Part Number  ADP5042 
Description  Micro PMU with 0.8 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset 
Manufacturer  Analog Devices 
ADP5042 datasheet 

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Data Sheet
APPLICATIONS INFORMATION
BUCK EXTERNAL COMPONENT SELECTION
Tradeoffs between performance parameters such as efficiency
and transient response can be made by varying the choice of
external components in the applications circuit, as shown in
Figure 66.
Inductor
The high switching frequency of the ADP5042 buck allows for
the selection of small chip inductors. For best performance, use
inductor values between 0.7 μH and 3 μH. Suggested inductors
are shown in Table 11.
The peaktopeak inductor current ripple is calculated using
the following equation:
×
−
V
(
V
V
)
=
OUT
IN
OUT
I
RIPPLE
×
×
V
f
L
IN
SW
where:
f
is the switching frequency.
SW
L is the inductor value.
The minimum dc current rating of the inductor must be greater
than the inductor peak current. The inductor peak current is
calculated using the following equation:
I
=
+
RIPPLE
I
I
PEAK
LOAD
(
MAX
)
2
Inductor conduction losses are caused by the flow of current
through the inductor, which has an associated internal dc
resistance (DCR). Larger sized inductors have smaller DCR,
which may decrease inductor conduction losses. Inductor core
losses are related to the magnetic permeability of the core material.
Because the buck is high switching frequency dctodc converters,
shielded ferrite core material is recommended for its low core
losses and low EMI.
Table 11. Suggested 1.0 μH Inductors
Dimensions
Vendor
Model
(mm)
Murata
LQM2MPN1R0NG0B
2.0 × 1.6 × 0.9
Murata
LQM18FN1R0M00B
1.6 × 0.8 × 0.8
Taiyo Yuden
CBMF1608T1R0M
1.6 × 0.8 × 0.8
Coilcraft
EPL2014102ML
2.0 × 2.0 × 1.4
TDK
GLFR1608T1R0MLR
1.6 × 0.8 × 0.8
Coilcraft
0603LS102
1.8 × 1.69 × 1.1
Toko
MDT2520CN
2.5 × 2.0 × 1.2
Output Capacitor
Higher output capacitor values reduce the output voltage ripple
and improve load transient response. When choosing this value,
it is also important to account for the loss of capacitance due to
output voltage dc bias.
Ceramic capacitors are manufactured with a variety of dielec
trics, each with a different behavior over temperature and
applied voltage. Capacitors must have a dielectric adequate
to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R
dielectrics with a voltage rating of 6.3 V or 10 V are recom
mended for best performance. Y5V and Z5U dielectrics are
not recommended for use with any dctodc converter because
of their poor temperature and dc bias characteristics.
The worstcase capacitance accounting for capacitor variation
over temperature, component tolerance, and voltage is calcu
lated using the following equation:
C
= C
EFF
OUT
where:
C
is the effective capacitance at the operating voltage.
EFF
TEMPCO is the worstcase capacitor temperature coefficient.
TOL is the worstcase component tolerance.
In this example, the worstcase temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
C
is 9.2481 μF at 1.8 V, as shown in Figure 61.
OUT
Substituting these values in the equation yields
C
= 9.2481 μF × (1 − 0.15) × (1 − 0.1) = 7.0747 μF
EFF
To guarantee the performance of the buck, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
12
I
DCR
SAT
(mA)
(mΩ)
10
1400
85
150
26
8
290
90
900
59
6
230
80
400
81
4
1350
85
2
0
0
Figure 61. Typical Capacitor Performance
Rev. A  Page 23 of 32
ADP5042
× (1 − TEMPCO) × (1 − TOL)
1
2
3
4
5
6
DC BIAS VOLTAGE (V)
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