ADP5043 Analog Devices, ADP5043 Datasheet - Page 16

• Manufacturer Part Number: ADP5043
• Description: Micro-PMU with 0.8 A Buck, 300 mA LDO, Supervisory, Watchdog, and Manual Reset
• Manufacturer: Analog Devices

ADP5043
THEORY OF OPERATION
POWER MANAGEMENT UNIT
The ADP5043 is a micro power management unit (micro PMU)
combing one step-down (buck) dc-to-dc regulator, one low
dropout linear regulator (LDO), and a supervisory circuit, with
dual watchdog, for processor control. The regulators are activated
by a logic level high applied to the respective EN pins. EN1
controls the buck regulator while EN2 controls the LDO. The
ADP5043 has factory programmed output voltages and reset
voltage threshold. Other features available in this device are the
MODE pin to control the buck switching operation, a status pin
(WSTAT) informing the external processor which watchdog
caused a reset, and a push-button reset input (nRSTO).
When a regulator is turned on, the output voltage is controlled
through a soft start circuit, which prevents a large inrush current
due to the discharged output capacitors.
MODE
PGND
AVIN
VIN1
EN1
EN2
SW
POFF
VDDA
OPMODE_FUSES
AND MODE
CONTROL
ENABLE
ADP5043
SEL
ANTISHOOT
THROUGH
DRIVER
PWM
COMP
I
LOW
CURRENT
LIMIT
AND
MODE
ENLDO
ENBK
PWM/PSM
CONTROL
BUCK1
GM ERROR
AMP
UNDERVOLTAGE
SOFT START
OSCILLATOR
SHUTDOWN
LOCK OUT
THERMAL
COMP
SYSTEM
ENBK
PSM
Figure 43. Functional Block Diagram
Rev. A | Page 16 of 32
75Ω
VOUT1
52kΩ
AGND
VDDA
The buck regulator can operate in forced PWM mode if the
MODE pin is at a logic high level. In forced PWM mode, the
switching frequency of the buck is always constant and does not
change with the load current. If the MODE pin is at a logic low
level, the switching regulator operates in auto PWM/PSM mode.
In this mode, the regulator operates at fixed PWM frequency
when the load current is above the power saving current threshold.
When the load current falls below the power saving current
threshold, the regulator enters power saving mode where the
switching occurs in bursts. The burst repetition rate is a
function of the current load and the output capacitor value.
This operating mode reduces the switching and quiescent
current losses.
VDDA
MR
R0
A
B
C
VIN2
WMOD
VDDA
Y
200kΩ
DEBOUNCE
ENWD1
R1
V
REF
WATCHDOG
DETECTOR1
CONTROL
LDO
WDI1
WATCHDOG
GENERATOR
MONITOR
RESET
STATUS
40kΩ
DETECTOR2
ENLDO
WATCHDOG
WDI2
R1
R2
600Ω
ENWD2
POFF
Data Sheet
VOUT2
WSTAT
nRSTO