PCM9211PTR

Manufacturer Part NumberPCM9211PTR
DescriptionIC TXRX DGTL AUDIO 216KHZ 48LQFP
ManufacturerTexas Instruments
TypeTransceiver
PCM9211PTR datasheet
 


Specifications of PCM9211PTR

ApplicationsHome TheaterMounting TypeSurface Mount
Package / Case48-LQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
Other names296-27688-2  
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Page 94/121

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PCM9211
SBAS495 – JUNE 2010
DATA
B7
B6
Reg Name
RSV
TXSCL2
Default Value
0
0
Memo
TXSCK[2:0]: DIT System Clock Control
000: 128f
S
001: 256f
(default)
S
010: 512f
S
011: Reserved
100: Controlled by DIR system clock rate
100: Controlled by DIR system clock rate
110: Controlled by DIR system clock rate
111: Controlled by DIR system clock rate
TXDSD: DIT DSD Input Enable
0: DSD input disable (default)
1: DSD input enable
When TXDSD is set to '1', the DIT LR clock is generated by the Bit Clock divided by 64.
The DIT source data are forced to all '0's. Provide the DSD source to MPIO_B0 for the
system clock (256f
), MPIO_B1 for the DSD bit clock (64f
S
MPIO_B3 for R-ch data.
This function is useful when it is desired to suppress system clock jitter by using the path
that is DIT to DIR. Jitter of the system clock generated by DIR is also reduced if the jitter
is high frequency.
TXFMT[1:0]:DIT Audio I/F Format Setting
2
00: 24-bit I
S (default)
01: 24-bit left-justified
10: 24-bit right-justified
11: 16-bit right-justified
94
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Register 61h, DIT Function Control 2/3
(Address: 61h, Write and Read)
B5
B4
B3
TXSCK1
TXSCK0
RSV
0
1
0
NOTE
), MPIO_B2 for L-ch data, and
S
Product Folder Link(s):
PCM9211
www.ti.com
B2
B1
B0
TXDSD
TXFMT1
TXFMT0
0
0
0
Copyright © 2010, Texas Instruments Incorporated