IC PROCESSOR DSPLD CAR 44-LQFP

TDA7501

Manufacturer Part NumberTDA7501
DescriptionIC PROCESSOR DSPLD CAR 44-LQFP
ManufacturerSTMicroelectronics
TypeCar Signal Processor
TDA7501 datasheet
 


Specifications of TDA7501

ApplicationsAutomotive SystemsMounting TypeSurface Mount
Package / Case44-LQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
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Features
Inputs:
– Quasi differential stereo input for CD
– Differential stereo inputs for phone,
navigation, FM, AM
– Single-ended input for cassette- four
independent input multiplexer and gain
stages
– Envelope-detector for AM noise-blanking
– Mixing of phone and navigation
– DC connection to DSP
– Dual MPX inputs
Outputs:
– 6 Output channels with independent
volume control
– 4 Main output channels with additional
input selector for phone and/or navigation
or CD
– Outputs level up to 4V rms
– AC connection from DSP
Digital control:
2
– SPI bus or I
C bus interface (selectable)
– Direct mute for the output stages and/or
high impedance mpx mute
Order codes
Part number
TDA7501
TDA7501TR
January 2007
Line driver for digital car radio
Signal processor (DSPLD)
Description
The line driver handles all analog input and output
signals for the digital car radio signal processor
TDA7501. The device contains four independent
input multiplexers to select the sources for the
DSP's four AD converters. Four additional gain
stages allow an adaptation to run the ADCs in
best S/N condition.
The six outputs have independent volume stages
with a large dynamic range. Using a 12V supply
the outputs are able to drive up to 4Vrms .
Package
LQFP44 (10 x 10 x 1.4 mm)
LQFP44 (10 x 10 x 1.4 mm)
Rev 5
TDA7501
LQFP44
Packing
Tray
Tape and Reel
1/29
www.st.com
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TDA7501 Summary of contents

  • Page 1

    ... Description The line driver handles all analog input and output signals for the digital car radio signal processor TDA7501. The device contains four independent input multiplexers to select the sources for the DSP's four AD converters. Four additional gain stages allow an adaptation to run the ADCs in best S/N condition ...

  • Page 2

    ... Single supply mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 SPI bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 I2C bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Software specification for both modes . . . . . . . . . . . . . . . . . . . . . . . . . 19 9.1 Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9.2 Reset condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9.3 Programming modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 TDA7501 ...

  • Page 3

    ... TDA7501 List of tables Table 1. Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Thermal data Table 4. Electrical characteristcs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 5. Switching characteristics (SPI mode Table 6. Subaddresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 7. Input selector 1L..3R, bits D7 ..D3 (subaddresses 0.. Table 8. Input selector 1L, bits D2 ..D0 (subaddresses Table 9. Input selector 1R, bits D2 ..D0 (subaddresses Table 10 ...

  • Page 4

    ... Output part Figure 11. Level diagram Figure 12. Speaker (Linedriver) outputs simplified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 13. Reference voltage generation Figure 14. Timing diagram for the SPI bus mode Figure 15. Timing diagram for switching characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 16. Test board diagram Figure 17. LQFP44 (10x10) mechanical data & package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . 27 4/29 TDA7501 ...

  • Page 5

    ... TDA7501 1 Block diagram and pin connections Figure 1. Block diagram Figure 2. Pin connection (top view) Block diagram and pin connections V33 1 SIGGND 2 CassL 3 CassR 4 CDL+ 5 CD- 6 CDR+ 7 PHONE PHONE- NAVI- 10 NAVI MUTE 33 SDA 32 SCL 31 SEL 30 SPKR1L 29 SPKR1R 28 SPKR2L 27 SPKR2R 26 SPKR3L 25 SPKR3R 24 OUTPUTREF ...

  • Page 6

    ... OUT 0dB Min. Typ. 7.5 8 Value 10.5 13.0 - -55 to +150 Value 65 = 25° 10kΩ; all gains = 0dB; L Min. Typ. 2.3 80 100 0.5 5 all stages 0.00 RMS 2 TDA7501 Max. Unit Unit V V °C °C Unit °C/W Max. Unit V RMS 0.08 % ...

  • Page 7

    ... TDA7501 Table 4. Electrical characteristcs (continued 1kHz; unless otherwise specified) Symbol V Output DC-voltage DCout Output impedance OUT1L out Output impedance OUT2L, 2R Quasi differential CD stereo input (non inverting) R Input resistance (see Fig Common mode rejection CMRR ratio V Output noise N Differential phone/navigation/FM/AM input (inverting) R Input resistance (see Fig ...

  • Page 8

    ... R = 10kΩ; all gains = 0dB; L Min. Typ. - 100 0.3 4.15 outre 8. 2.3 2.8 = 12V 3.0 7 106 110 0.00 ; all stages 0dB 5 80 100 80 100 2.4 0 TDA7501 Max. Unit RMS V RMS V RMS kΩ 120 W μV μV μV μ 0. 0 1.8 ...

  • Page 9

    ... TDA7501 3 Description of the input part On the input side, the TDA7501 (see signals to the four AD converters of the digital car radio signal processor TDA7500. The audio signals are adjusted by the input gain stage to the internal reference signal with 2V rms referred to 4.15V (=V33 ·1.2575). The following CODEC interface attenuates the ...

  • Page 10

    ... Also two seperate level inputs are present which are followed by level-shifters to allow the use of the TDA7500's ADCs. For AM noise blanking an envelope detector driven by the also available. Figure 4. Quasi differential input-stage. Figure 5. Mono differential input-stage. Figure 6. Differential input-stage for AM/FM. 10/29 Figure 4) can be used for (external) CD changer. Figure 6) is used to connect AM and FM TDA7501 Figure 5) ...

  • Page 11

    ... Dual MPX mode The TDA7501 is able to support a twin tuner concept via the Dual MPX Mode. In this configuration the FM pin and the AM-pin are acting as MPX1 and MPX2 inputs. The DC Voltage at the TUNER pin controls whether MPX1, both MPX signals or MXX2 is used to decode the stereo FM signal (see hysteresis of 500mV ...

  • Page 12

    ... Description of the input part 3.4 Transfer function of the AM/FM level inputs In the TDA7501 two level shift stages convert a tuner level (DC) signal to a unipolar output signal with respect to the Codec Interface reference, that is 1.65V. The FM level input can be programmed to a signal range of either (Lo range) which is the default (Hi range) ...

  • Page 13

    ... With a single supply (V maximum. Figure 10. Output part. 4.1 Overall gain structure The overall gain structure of the TDA7501 can be shown in its target application together with the V225. The output part in level select (D6/4) offers an additional adaption to the DSP's output level Description of the output part = ...

  • Page 14

    ... In the external reference mode the linedriver amplifiers reference tracks the voltage present at the OUTPUTREF pin. This reference does not necessary have to be external to the device, it can also be generated by invoking the VCC/2 divider inside the TDA7501 (bit D1/6). In practice, the term external reference implied that the OUTPUTREF pin at least has to connect to an external capacitor ...

  • Page 15

    ... For best performance it is recommended to filter the V33 reference pin by means of a passive second order lowpass as shown in a direct DC coupling between the TDA7501 and the DSP because of the accurate matching of DC levels. On the output side the TDA7501 offers two main modes: a single supply and a dual supply mode. 5.1 ...

  • Page 16

    ... Digital interface 6 Digital interface The TDA7501 digital interface offers two different protocols: SPI and I2C. To select I2C-mode the SEL-pin has to beconnected to VDD. If the voltage at the SEL-pin is more than about 1V below the VDD voltage the interface switches to SPI-mode. In both cases the interface is able to work with a 3.3V microprocessor as well as with a 5V microprocessor ...

  • Page 17

    ... TDA7501 7 SPI bus mode 7.1 Interface protocol The TDA7501 SPI interface protocol comprises : ● a subaddress and ● a sequence of n databytes each consisting of 8 bits (see The interface accepts both a positiv (Cpol = 1, Cpha = 1) as well as a negativ (Cpol = 0, Cpha = 0) clocking scheme. However, the data transmitted has to be valid on the rising edges of the serial clock SCL ...

  • Page 18

    ... CHIP ADDRESS MSB ACK = Acknowledge S = Start P = Stop 18/29 SUBADDRESS LSB MSB SA3 SA2 SA1 SA0 AC K TDA7501 DATA 1...DATA n LSB MSB LSB DATA ...

  • Page 19

    ... TDA7501 9 Software specification for both modes 9.1 Auto increment If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled. 9.2 Reset condition A Power-On-Reset is invoked if the Supply-Voltage below than 3.5V. After POR the following data is written automatically into the registers of all subaddresses : ...

  • Page 20

    ... Function D1 D0 mute off on gain 15dB 14dB 13dB 12dB 11dB 10dB 9dB 8dB 7dB 6dB 5dB 4dB 3dB 2dB 1dB 0dB LSB Function D1 D0 source select 0 0 CDL 0 1 Phone/FDL 1 0 Navigation/FDR 1 1 Phone/Navigation mix 0 0 CassL 0 1 MPX-RDS AM-level TDA7501 ...

  • Page 21

    ... TDA7501 Table 9. Input selector 1R, bits D2 ..D0 (subaddresses 1) MSB D7 D6 Table 10. Input selector 2L, bits D2 ..D0 (subaddresses 2) MSB D7 D6 Table 11. Input selector 2R, bits D2 ..D0 (subaddresses 3) MSB Software specification for both modes LSB Function D1 D0 source select 0 0 CDR 0 1 Phone/FDL 1 0 Navigation/FDR 1 1 Phone/Navigation mix ...

  • Page 22

    ... Input configuration quasidifferential input (no level shift function) Navi & AM Level input gain 15dB 14dB 13dB 12dB 11dB 10dB 9dB 8dB 7dB 6dB 5dB 4dB 3dB 2dB 1dB 0dB TDA7501 ...

  • Page 23

    ... TDA7501 Table 13. Mode select (subaddress 5) MSB Table 14. Configuration (subaddress 6) MSB Software specification for both modes LSB LSB Function AM-IF rectifier gain 18dB 15.5dB 12dB 6dB AM-IF rectifier corner frequency 14KHz 18.5KHz 28KHz 56KHz backkground tuner select (internal AM- path) FM-in (MPX1) AM-in (MPX2) ...

  • Page 24

    ... LSB Function D1 D0 source select SPKR Bypass 0 1 CDL 1 0 Phone/Navigation mix / IN1L 1 1 IN1L source select SPKR 1R Bypass CDL Phone/Navigation mix / IN1RI N1R source select SPKR 2L Bypass CDL mute IN2L source select SPKR 2R Bypass CDL mute IN2R TDA7501 ...

  • Page 25

    ... TDA7501 Table 16. Volume speaker outputs (subaddresses 8...13) MSB Table 17. FM level range (subaddress 14) MSB The unused subaddresses 14/15 must be programmed to "11111110" to allow software compatibility to future extensions Software specification for both modes LSB Function +15dB ; ; : 0 1 +1dB 0 0 0dB 0 0 0dB 0 1 -1dB ...

  • Page 26

    ... IN2L 37 220nF IN2R 36 220nF IN3L 35 220nF IN3R 34 MUTE 33 SDA 32 SCL 31 SEL 30 SPKR1L 29 SPKR1R 28 SPKR2L 27 SPKR2R 26 SPKR3L 25 SPKR3R 24 10K OUTPUTREF 6.8K 10μF 10μF 6V VCC 8.3V 12V D00AU1210 TDA7501 TDA7500 MUTE SDA SCL SEL OUTLF OUTRF OUTLR OUTRR OUTSWL OUTSWR VCC 12V ...

  • Page 27

    ... TDA7501 10 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

  • Page 28

    ... Revision history 11 Revision history Table 18. Document revision history Date 21-Jun-2004 22-Jun-2004 9-Sep-2004 15-Dec-2004 17-Jan-2007 28/29 Revision 1 Initial release. 2 Minor revision, content edit. 3 Minor revision, content edit. 4 Minor revision, content edit. 5 Package changed, layout change, text modifications TDA7501 Changes ...

  • Page 29

    ... TDA7501 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...