IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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Region
0
k0
O1
T1
DRC Input Level
Figure 2-17. Dynamic Range Compression (DRC) Transfer Function Structure
The three regions shown in
Thresholds T1 and T2 define region boundaries.
Offsets O1 and O2 define the DRC gain coefficient settings at thresholds T1 and T2, respectively.
Slopes k0, k1, and k2 define whether compression or expansion is to be performed within a given
region. The magnitudes of the slopes define the degree of compression or expansion to be performed.
The three sets of parameters are all defined in logarithmic space and adhere to the following rules:
The maximum input sample into the DRC is referenced at 0 dB. All values below this maximum value
then have negative values in logarithmic (dB) space.
The samples input into the DRC are 32-bit words and consist of the upper 32 bits of the 48-bit word
format used by the digital audio processor (DAP). The 48-bit DAP word is derived from the 32-bit serial
data received at the serial-audio receive port by adding 8 bits of headroom above the 32-bit word and
8 bits of computational precision below the 32-bit word. If the audio-processing steps between the SAP
input and the DRC input result in no accumulative boost or cut, the DRC operates on the 8 bits of
headroom and the 24 MSBs of the audio sample. Under these conditions, a 0-dB (maximum value)
audio sample (0x7FFF FFFF) is seen at the DRC input as a –48-dB sample (8 bits
–48 dB).
Thresholds T1 and T2 define, in dB, the boundaries of the three regions of the DRC, as referenced to
the rms value of the data into the DRC. Zero-valued threshold settings reference the maximum-valued
rms input into the DRC and negative-valued thresholds reference all other rms input levels.
Positive-valued thresholds have no physical meaning and are not allowed. In addition, zero-valued
threshold settings are not allowed.
Although the DRC input is limited to 32-bit words, the DRC itself operates using the 48-bit word format of
the DAP. The 32-bit samples input into the DRC are placed in the upper 32 bits of this 48-bit word space.
This means that the threshold settings must be programmed as 48-bit (25.23 format) numbers.
Zero-valued and positive-valued threshold settings are not allowed and cause
unpredictable behavior if used.
Offsets O1 and O2 define, in dB, the attenuation (cut) or gain (boost) applied by the DRC-derived gain
coefficient at the threshold points T1 and T2, respectively. Positive offsets are defined as cuts, and
thus boost or gain selections are negative numbers. Offsets must be programmed as 48-bit (25.23
format) numbers.
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8-Channel Digital Audio PWM Processor
Region
Region
1
2
k2
k1
O2
T2
Figure 2-17
are defined by three sets of programmable coefficients:
CAUTION
TAS5508A
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
1:1 Transfer Function
Implemented Transfer Function
M0014-01
–6.02 dB/bit =
Description
35