IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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CONTROL
Bass filter sets
Loudness (5508)
AM interference enable
AM interference IF
AM interference select sequence
Tuned frequency and mode
Subwoofer PSVC control
PSVC and PSVC range
After the initialization time, the TAS5508A starts the transition to the operational state with the master
volume set at mute.
Because the TAS5508A has an external crystal time base, following the release of RESET, the TAS5508A
sets the MCLK and data rates and performs the initialization sequences. The PWM outputs are held at a
mute state until the master volume is set to a value other than mute via I
3.2.2 Power Down (PDN)
The TAS5508A can be placed into the power-down mode by holding the PDN terminal low. When the
power-down mode is entered, both the PLL and the oscillator are shut down. Volume is immediately set to
full attenuation (there is no ramp down). This control uses the PWM mute sequence that provides a low
click and pop transition to the hard mute state (M). A detailed description of the PWM mute sequence is
contained in the PWM section.
Power down is an asynchronous operation that does not require MCLK to go into the power-down state.
To initiate the power-up sequence requires MCLK to be operational and the TAS5508A to receive 5
MCLKs prior to the release of PDN.
As long as the PDN terminal is held low, the device is in the power-down state with the PWM outputs in a
hard mute (M) state. During power down, all I
shows the device output signals while PDN is active.
Following the application of PDN, the TAS5508A does not perform a quiet shutdown to prevent clicks and
pops produced during the application (the leading edge) of this command. The application of PDN
immediately performs a PWM stop. A quiet stop sequence can be performed by first applying MUTE
before PDN.
When PDN is released, the system goes to the end state specified by MUTE and BKND_ERR pins and
2
the I
C register settings.
The crystal time base allows the TAS5508A to determine the CLK rates. Once these rates are determined,
the TAS5508A unmutes the audio.
Submit Documentation Feedback
8-Channel Digital Audio PWM Processor
Table 3-2. Values Set During Reset (continued)
Filter set 3
Loudness disabled, default values
Disabled
455
1
0000, BCD
Enabled
Disabled/0 dB
2
C and serial data bus operations are ignored.
Table 3-3. Device Outputs During Power Down
SIGNAL
SIGNAL STATE
Valid
PWM P-outputs
M-state = low
PWM M-outputs
M-state = low
SDA
PSVC
M-state = low
TAS5508A
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
SETTING
2
C.
Low
Signal input
TAS5508A Controls and Status
Table 3-3
45