IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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4.8.2 Left-Justified Timing
Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it
is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 64
f
is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK toggles.
S
The data is written MSB first and is valid on the rising edge of the bit clock. The TAS5508A masks unused
trailing data bit positions.
2-Channel Left-Justified Stereo Input
32 Clks
LRCLK
Left Channel
SCLK
MSB
24-Bit Mode
23 22
9
8
5
4
20-Bit Mode
19 18
5
4
1
0
16-Bit Mode
15 14
1
0
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8-Channel Digital Audio PWM Processor
SCLK
LSB
MSB
1
23 22
0
19 18
15 14
Figure 4-10. Left-Justified 64-f
S
TAS5508A
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
32 Clks
Right Channel
9
8
5
4
1
0
5
4
1
0
1
0
Format
Electrical Specifications
LSB
T0034-02
63