IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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TAS5508A
8-Channel Digital Audio PWM Processor
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
4.8.3 Right-Justified Timing
Right-justified (RJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when
it is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at
64
f
is used to clock in the data. The first bit of data appears on the data lines eight bit-clock periods (for
S
24-bit data) after LRCLK toggles. In RJ mode the LSB of data is always clocked by the last bit clock before
LRCLK transitions. The data is written MSB first and is valid on the rising edge of the bit clock. The TAS5508A
masks unused leading data bit positions.
2-Channel Right-Justified (Sony Format) Stereo Input
32 Clks
LRCLK
Left Channel
SCLK
MSB
24-Bit Mode
23 22
19 18
20-Bit Mode
19 18
16-Bit Mode
64
Electrical Specifications
SCLK
LSB
MSB
15 14
1
0
15 14
1
0
15 14
1
0
Figure 4-11. Right-Justified 64-f
32 Clks
Right Channel
23 22
19 18
15 14
19 18
15 14
15 14
Format
S
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LSB
1
0
1
0
1
0
T0034-03