IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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2
5
I
C Serial-Control Interface (Slave Address 0x36)
The TAS5508A has a bidirectional I
supports both 100-kbps and 400-kbps data transfer rates for single- and multiple-byte write and read
operations. This is a slave-only device that does not support a multimaster bus environment or wait state
insertion. The control interface is used to program the registers of the device and to read device status.
The TAS5508A supports the standard-mode I
operation (400 kHz maximum). The TAS5508A performs all I
2
5.1
General I
C Operation
2
The I
C bus employs two signals—SDA (data) and SCL (clock)—to communicate between integrated
circuits in a system. Data is transferred on the bus serially, one bit at a time. The address and data can be
transferred in byte (8-bit) format, with the most significant bit (MSB) transferred first. In addition, each byte
transferred on the bus is acknowledged by the receiving device with an acknowledge bit. Each transfer
operation begins with the master device driving a start condition on the bus and ends with the master
device driving a stop condition on the bus. The bus uses transitions on SDA while the clock is high to
indicate start and stop conditions. A high-to-low transition on SDA indicates a start and a low-to-high
transition indicates a stop. Normal data bit transitions must occur within the low time of the clock period.
These conditions are shown in
read/write (R/W) bit to open communication with another device and then wait for an acknowledge
condition. The TAS5508A holds SDA low during the acknowledge clock period to indicate an
acknowledgement. When this occurs, the master transmits the next byte of the sequence. Each device is
addressed by a unique 7-bit slave address plus R/W bit (1 byte). All compatible devices share the same
signals via a bidirectional bus using a wired-AND connection. An external pullup resistor must be used for
the SDA and SCL signals to set the high level for the bus.
R/
SDA
7-Bit Slave Address
W
7
6
5
4
3
2
1 0
SCL
Start
The number of bytes that can be transmitted between start and stop conditions is unlimited. When the last
word transfers, the master generates a stop condition to release the bus. A generic data transfer
sequence is shown in
Figure
The 7-bit address for the TAS5508A is 0011011.
5.2
Single- and Multiple-Byte Transfers
The serial-control interface supports both single-byte and multiple-byte read/write operations for status
registers and the general control registers associated with the PWM. However, for the DAP data
processing registers, the serial-control interface supports only multiple-byte (four-byte) read/write
operations.
During multiple-byte read operations, the TAS5508A responds with data, a byte at a time, starting at the
subaddress assigned, as long as the master device continues to respond with acknowledges. If a
particular subaddress does not contain 32 bits, the unused bits are read as logic 0.
Submit Documentation Feedback
2
C interface that is compatible with the Inter-IC (I
2
C bus operation (100 kHz maximum) and the fast I
Figure
5-1. The master generates the 7-bit slave address and the
8-Bit Register Data For
8-Bit Register Address (N)
A
A
Address (N)
7
6
5
4
3
2
1 0
7
6
5
2
Figure 5-1. Typical I
C Sequence
5-1.
I
8-Channel Digital Audio PWM Processor
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
2
C) bus protocol and
2
2
C operations without I
C wait cycles.
8-Bit Register Data For
A
Address (N)
4
3
2
1 0
7
6
5
4
3
2
1 0
2
C Serial-Control Interface (Slave Address 0x36)
TAS5508A
2
C bus
A
Stop
T0035-01
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