IC DGTL AUDIO PWM PROC 64-TQFP

TAS5508APAG

Manufacturer Part NumberTAS5508APAG
DescriptionIC DGTL AUDIO PWM PROC 64-TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508APAG datasheet
 


Specifications of TAS5508APAG

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFP, 64-VQFPFor Use WithTAS5342DDV6EVM - TAS5342DDV6EVMTAS5508-5142K7EVM - EVAL MODULE FOR TAS5508B/TAS5142TAS5508-5122C6EVM - EVAL MODULE FOR TAS5508B/TAS5122TAS5508-5121K8EVM - EVAL MODULE FOR TAS5508B/TAS5121
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-17475
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2-1
Serial Data Formats
2-2
TAS5508A Audio-Processing Feature Sets
2-3
Contents of One 20-Byte Biquad Filter Register (Default = All-Pass)
2-4
Bass and Treble Filter Selections
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2-5
Linear Gain Step Size
2-6
Default Loudness Compensation Parameters
2-7
Loudness Function Parameters
2-8
DRC Recommended Changes From TAS5508A Defaults
3-1
Device Outputs During Reset
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3-2
Values Set During Reset
3-3
Device Outputs During Power Down
3-4
Device Outputs During Back-End Error
3-5
Description of the Channel Configuration Registers (0x05 to 0x0C)
3-6
Recommended TAS5508A Configurations for Texas Instruments Power Stages
3-7
Audio System Configuration (General Control Register 0xE0)
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3-8
Volume Ramp Rates in ms
3-9
Interchannel Delay Default Values
7-1
Clock Control Register Format
7-2
General Status Register Format
7-3
Error Status Register Format
7-4
System Control Register 1 Format
7-5
System Control Register 2 Format
7-6
Channel Configuration Control Register Format
7-7
Headphone Configuration Control Register Format
7-8
Serial Data Interface Control Register Format
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7-9
Soft Mute Register Format
7-10
Automute Control Register Format
7-11
Automute PWM Threshold and Back-End Reset Period Register Format
7-12
Modulation Index Limit Register Format
7-13
Interchannel Delay Register Format
7-14
Channel Offset Register Format
7-15
Bank-Switching Command Register Format
7-16
Channel 1–8 Input Mixer Register Format
7-17
Bass Management Register Format
7-18
Biquad Filter Register Format
7-19
Contents of One 20-Byte Biquad Filter Register (Default = All-Pass)
7-20
Channel 1–8 Bass and Treble Bypass Register Format
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7-21
Loudness Register Format
7-22
Channel 1–7 DCR1 Control Register Format
8-Channel Digital Audio PWM Processor
List of Tables
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TAS5508A
SLES119A – FEBRUARY 2004 – REVISED JULY 2009
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List of Tables
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