The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz

LPC1759FBD80

Manufacturer Part NumberLPC1759FBD80
DescriptionThe LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
ManufacturerNXP Semiconductors
LPC1759FBD80 datasheet
 


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NXP Semiconductors
7.25 Repetitive Interrupt (RI) timer
The repetitive interrupt timer provides a free-running 32-bit counter which is compared to
a selectable value, generating an interrupt when a match occurs. Any bits of the
timer/compare can be masked such that they do not contribute to the match detection.
The repetitive interrupt timer can be used to create an interrupt that repeats at
predetermined intervals.
7.25.1 Features
32-bit counter running from PCLK. Counter can be free-running or be reset by a
generated interrupt.
32-bit compare value.
32-bit compare mask. An interrupt is generated when the counter value equals the
compare value, after masking. This allows for combinations not possible with a simple
compare.
7.26 ARM Cortex-M3 system tick timer
The ARM Cortex-M3 includes a system tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a 10 ms interval. In the LPC1759/58/56/54/52/51, this
timer can be clocked from the internal AHB clock or from a device pin.
7.27 Watchdog timer
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
7.27.1 Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the Internal RC (IRC)
oscillator, the RTC oscillator, or the APB peripheral clock. This gives a wide range of
potential timing choices of Watchdog operation under different power reduction
conditions. It also provides the ability to run the WDT from an entirely internal source
that is not dependent on an external crystal and its associated components and wiring
for increased reliability.
Includes lock/safe feature.
LPC1759_58_56_54_52_51
Product data sheet
LPC1759/58/56/54/52/51
 256  4) to (T
cy(WDCLK)
 4.
cy(WDCLK)
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 March 2011
32-bit ARM Cortex-M3 microcontroller
 2
 4) in
32
cy(WDCLK)
© NXP B.V. 2011. All rights reserved.
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