LPC1765FET100 NXP Semiconductors, LPC1765FET100 Datasheet - Page 58

The LPC1765 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 100 MHz

LPC1765FET100

Manufacturer Part Number
LPC1765FET100
Description
The LPC1765 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 100 MHz
Manufacturer
NXP Semiconductors
Datasheet

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Table 15.
[1]
LPC1769_68_67_66_65_64_63
Product data sheet
T
Symbol
SSP interface
t
su(SPI_MISO)
amb
Fig 20. MISO line set-up time in SSP Master mode
The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
= 25
C; V
Dynamic characteristic: SSP interface
Parameter
SPI_MISO set-up time
DD(3V3)
11.7 SSP interface
MOSI
MISO
shifting edges
SCK
over specified ranges.
All information provided in this document is subject to legal disclaimers.
Conditions
measured in SPI Master mode;
see
Figure 20
Rev. 8 — 14 November 2011
t
su(SPI_MISO)
LPC1769/68/67/66/65/64/63
[1]
32-bit ARM Cortex-M3 microcontroller
Min
30
sampling edges
Typ
002aad326
© NXP B.V. 2011. All rights reserved.
Max
-
58 of 82
Unit
ns

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