LPC2420_60

Manufacturer Part NumberLPC2420_60
DescriptionNXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
ManufacturerNXP Semiconductors
LPC2420_60 datasheet
 
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NXP Semiconductors
7.10.2.1 Features
OHCI compliant.
Two downstream ports.
Supports per-port power switching.
7.10.3 USB OTG controller
USB OTG is a supplement to the USB 2.0 specification that augments the capability of
existing mobile devices and USB peripherals by adding host functionality for connection to
USB peripherals.
The OTG controller integrates the host controller, device controller, and a master-only
2
I
C-bus interface to implement OTG dual-role device functionality. The dedicated I
interface controls an external OTG transceiver.
7.10.3.1 Features
Fully compliant with On-The-Go supplement to the USB 2.0 Specification, Revision
1.0a.
Hardware support for Host Negotiation Protocol (HNP).
Includes a programmable timer required for HNP and Session Request Protocol
(SRP).
Supports any OTG transceiver compliant with the OTG Transceiver Specification
(CEA-2011), Rev. 1.0.
7.11 CAN controller and acceptance filters (LPC2460 only)
The Controller Area Network (CAN) is a serial communications protocol which efficiently
supports distributed real-time control with a very high level of security. Its domain of
application ranges from high-speed networks to low cost multiplex wiring.
The CAN block is intended to support multiple CAN buses simultaneously, allowing the
device to be used as a gateway, switch, or router between two of CAN buses in industrial
or automotive applications.
Each CAN controller has a register structure similar to the NXP SJA1000 and the PeliCAN
Library block, but the 8-bit registers of those devices have been combined in 32-bit words
to allow simultaneous access in the ARM environment. The main operational difference is
that the recognition of received Identifiers, known in CAN terminology as Acceptance
Filtering, has been removed from the CAN controllers and centralized in a global
Acceptance Filter.
7.11.1 Features
Two CAN controllers and buses.
Data rates to 1 Mbit/s on each bus.
32-bit register and RAM access.
Compatible with CAN specification 2.0B, ISO 11898-1.
Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN
buses.
LPC2420_60
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6.1 — 22 September 2011
LPC2420/2460
Flashless 16-bit/32-bit microcontroller
© NXP B.V. 2011. All rights reserved.
2
C-bus
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