LPC2420_60 NXP Semiconductors, LPC2420_60 Datasheet - Page 35
LPC2420_60
Manufacturer Part Number
LPC2420_60
Description
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer
NXP Semiconductors
Datasheet
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LPC2420_60
Product data sheet
7.12.1 Features
7.13.1 Features
7.14.1 Features
7.12 10-bit ADC
7.13 10-bit DAC
7.14 UARTs
The LPC2420/2460 contains one ADC. It is a single 10-bit successive approximation ADC
with eight channels.
The DAC allows the LPC2420/2460 to generate a variable analog output. The maximum
output value of the DAC is V
The LPC2420/2460 contains four UARTs. In addition to standard transmit and receive
data lines, UART1 also provides a full modem control handshake interface.
The UARTs include a fractional baud rate generator. Standard baud rates such as
115200 Bd can be achieved with any crystal frequency above 2 MHz.
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Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
FullCAN messages can generate interrupts.
10-bit successive approximation ADC
Input multiplexing among 8 pins
Power-down mode
Measurement range 0 V to V
10-bit conversion time 2.44 s
Burst conversion mode for single or multiple inputs
Optional conversion on transition of input pin or Timer Match signal
Individual result registers for each ADC channel to reduce interrupt overhead
10-bit DAC
Resistor string architecture
Buffered output
Power-down mode
Selectable output drive
16 B Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
All information provided in this document is subject to legal disclaimers.
Rev. 6.1 — 22 September 2011
i(VREF)
i(VREF)
.
Flashless 16-bit/32-bit microcontroller
LPC2420/2460
© NXP B.V. 2011. All rights reserved.
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