LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 22

The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2

LPC3130_3131

Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
Fig 5.
masters
= master/slave connection supported by matrix
(1) LPC3131 only.
AHB MULTILAYER MATRIX
DMA
LPC3130/3131 multi-layer AHB matrix connections
0
1
926EJ-S
ARM
This module has the following features:
2
USB-OTG
MASTER
AHB
3
slaves
10
11
12
13
0
1
2
3
4
5
6
7
8
9
Rev. 1 — 9 February 2009
synchronous bridge
INTERRUPT CONTROLLER
asynchronous
asynchronous
asynchronous
asynchronous
BRIDGE 0
BRIDGE 1
BRIDGE 2
BRIDGE 3
BRIDGE 4
AHB-APB
AHB-APB
AHB-APB
AHB-APB
AHB-APB
USB HIGH-SPEED OTG
MPMC CONTROLLER
NAND CONTROLLER
bridge
bridge
bridge
bridge
MPMC CONFIG
MCI SD/SDIO
ISRAM 1
BUFFER
ISRAM 0
ISROM
Low-cost, low-power ARM926EJ-S microcontrollers
TIMER 0
EVENT ROUTER
PCM
DMA REGISTERS
(1)
0
0
0
0
0
LCD
I2S0/1
1
TIMER 1
1
UART
2
10-bit ADC
NAND REGISTERS
1
TIMER 2
2
LPC3130/3131
3
SPI
1
WDT
2
TIMER 3
RNG
6
3
SYSTEM CONTROL
© NXP B.V. 2009. All rights reserved.
IOCONFIG
PWM
4
5
3
002aae126
I2C0
5
CGU
4
22 of 68
6
I2C0

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