LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 45

The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2

LPC3130_3131

Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
Fig 14. LCD timing (serial mode)
(serial data out)
(serial data in)
mLCD_DB13
mLCD_DB14
mLCD_DB15
(serial clock)
mLCD_CSB
mLCD_RS
9.1.3 Serial mode
Table 16.
C
[1]
Symbol Parameter
T
t
t
t
t
t
t
t
t
t
t
t
w(clk)H
w(clk)L
r
f
su(A)
h(A)
su(D)
h(D)
su(S)
h(S)
d(QV)
L
cy(clk)
= 25 pF, T
Timing is determined by the LCD Interface Control Register fields: PS = 1; SERIAL_CLK_SHIFT = 3;
SERIAL_READ_POS = 3. See the LPC3130/3131 user manual .
clock cycle time
HIGH clock pulse width
LOW clock pulse width
rise time
fall time
address set-up time
address hold time
data input set-up time
data input hold time
chip select set-up time
chip select hold time
data output valid delay time
Dynamic characteristics: LCD controller serial mode
amb
= 40 C to +85 C, unless otherwise specified; V
t
f
Rev. 1 — 9 February 2009
t
d(QV)
t
w(clk)L
t
su(S)
t
su(A)
Low-cost, low-power ARM926EJ-S microcontrollers
T
t
su(D)
cy(clk)
Conditions
t
r
t
t
t
dis(Q)
h(A)
h(D)
t
w(clk)H
t
h(S)
[1]
[1]
[1]
Min
-
-
-
2
2
-
-
<tbd>
<tbd>
-
-
-
LPC3130/3131
DD(IO)
Typ
5
3
2
-
-
3
2
-
-
3
1
1
= 1.8 V and 2.8 V (SUP8).
LCDCLK
LCDCLK
LCDCLK
LCDCLK
LCDCLK
LCDCLK
LCDCLK
LCDCLK
© NXP B.V. 2009. All rights reserved.
002aae209
Max
-
-
-
5
5
-
-
-
-
-
-
-
45 of 68
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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