LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 46

• Manufacturer Part Number: LPC3130_3131
• Description: The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 17.
C
[1]
[2]
[3]
[4]
[5]
[6]
LPC3130_3131_1
Preliminary data sheet
Symbol
Common to read and write cycles
t
Read cycle parameters
t
t
t
t
t
t
t
t
t
t
t
t
Write cycle parameters
t
t
t
t
t
t
t
t
t
t
CSLAV
OELAV
BLSLAV
CSLOEL
CSLBLSL
OELOEH
BLSLBLSH
su(DQ)
h(DQ)
CSHOEH
CSHBLSH
OEHANV
BLSHANV
CSLDV
CSLWEL
CSLBLSL
WELDV
WELWEH
BLSLBLSH
WEHANV
WEHDNV
BLSHANV
BLSHDNV
L
= 25 pF, T
Refer to the LPC3130/3131 user manual for the programming of WAITOEN and HCLK.
Refer to the LPC3130/3131 user manual for the programming of WAITRD and HCLK.
(WAITRD
Refer to the LPC3130/3131 user manual for the programming of WAITWEN and HCLK.
Refer to the LPC3130/3131 user manual for the programming of WAITWR and HCLK.
(WAITWD
Dynamic characteristics: static external memory interface
Parameter
CS LOW to address valid
time
OE LOW to address valid
time
BLS LOW to address valid
time
CS LOW to OE LOW time
CS LOW to BLS LOW time
OE LOW to OE HIGH time
BLS LOW to BLS HIGH time
data input/output set-up time
data input/output hold time
CS HIGH to OE HIGH time
CS HIGH to BLS HIGH time
OE HIGH to address invalid
time
BLS HIGH to address invalid
time
CS LOW to data valid time
CS LOW to WE LOW time
CS LOW to BLS LOW time
WE LOW to data valid time
WE LOW to WE HIGH time
BLS LOW to BLS HIGH time
WE HIGH to address invalid
time
WE HIGH to data invalid time
BLS HIGH to address invalid
time
BLS HIGH to data invalid
time
amb
WAITOEN + 1) = 3 min at 60 MHz.
WAITWEN + 1) = 3 min at 60 MHz.
= 40 C to +85 C, unless otherwise specified; V
9.2 SRAM controller
Conditions
Rev. 1 — 9 February 2009
[1][2][3]
[1][2][3]
[4][5][6]
[4][5]
[1]
[1]
[1]
[4]
[4]
[4]
Low-cost, low-power ARM926EJ-S microcontrollers
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DD(IO)
Typ
0
0
0
0 + WAITOEN
0 + WAITOEN
(WAITRD
(WAITRD
8
0
0
0
2
2
0
(WAITWEN + 1)
WAITWEN
0
(WAITWR
(WAITWR
1
1
0
0
= 1.8 V and 2.8 V (SUP8).
WAITOEN
WAITOEN
HCLK
HCLK
(WAITWEN + 1)
HCLK
HCLK
WAITOEN + 1)
WAITOEN + 1)
WAITWEN + 1)
WAITWEN + 3)
HCLK
HCLK
HCLK
HCLK
HCLK
LPC3130/3131
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
© NXP B.V. 2009. All rights reserved.
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
46 of 68
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns