P89LPC9331_9341_9351_9361 NXP Semiconductors, P89LPC9331_9341_9351_9361 Datasheet
P89LPC9331_9341_9351_9361
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P89LPC9331_9341_9351_9361 Summary of contents
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P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/ byte-erasable flash with 8-bit ADCs Rev. 5 — 10 January 2011 1. General description The P89LPC9331/9341/9351/9361 is a single-chip microcontroller, available in low cost packages, based ...
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... Four interrupt priority levels. Eight keypad interrupt inputs, plus two additional external interrupt inputs. Schmitt trigger port inputs. Second data pointer. Emulation support. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. ...
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... P89LPC9351FDH P89LPC9361FDH 3.1 Ordering options Table 2. Type number P89LPC9331FDH P89LPC9331HDH P89LPC9341FDH P89LPC9351FA P89LPC9351FDH P89LPC9361FDH P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Ordering information Package Name Description TSSOP28 plastic thin shrink small outline package; 28 leads; body width 4.4 mm TSSOP28 plastic thin shrink small outline package ...
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... P89LPC9331/9341/9351/9361 P3[1:0] P2[7:0] P1[7:0] P0[7:0] XTAL1 CRYSTAL OR RESONATOR XTAL2 (1) P89LPC9351/9361 (2) PGA1 on P89LPC9351/9361 (3) PGA0 on P89LPC9351/9361 Fig 1. Block diagram P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ACCELERATED 2-CLOCK 80C51 CPU 4 kB/8 kB/16 kB CODE FLASH internal bus 256-BYTE DATA RAM 512-BYTE (1) AUXILIARY RAM 512-BYTE ...
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... AD01 KBI1 AD10 KBI2 AD11 KBI3 AD12 DAC1 KBI4 AD13 KBI5 KBI6 KBI7 CLKOUT Fig 3. Functional diagram (P89LPC9351/9361) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core V DD CMP2 CIN2B CIN2A CIN1B PORT 0 CIN1A CMPREF CMP1 T1 P89LPC9331/ P89LPC9341 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Fig 5. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core P2.0/AD03/DAC0 1 2 P2.1/AD02 3 P0.0/CMP2/KBI0/AD01 4 P1.7/AD00 P1.6 5 P1.5/RST P89LPC9331FDH/ 8 P3.1/XTAL1 P89LPC9341FDH 9 P3.0/XTAL2/CLKOUT P1.4/INT1 10 P1.3/INT0/SDA 11 12 P1.2/T0/SCL 13 P2.2/MOSI 14 P2.3/MISO P89LPC9331/9341 TSSOP28 pin configuration P2 ...
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... NXP Semiconductors Fig 6. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 5 P1.6/OCB P1.5/RST P3.1/XTAL1 8 P89LPC9351FA 9 P3.0/XTAL2/CLKOUT P1.4/INT1 10 P1.3/INT0/SDA 11 P89LPC9351 PLCC28 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 January 2011 25 P0.2/CIN2A/KBI2/AD11 24 P0 ...
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... KBI3/AD12 P0.4/CIN1A/ 23 KBI4/DAC1/AD13 P0.5/CMPREF/ 22 KBI5 P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O Port 0: Port 8-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled ...
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... P1.1/RXD 17 P1.2/T0/SCL 12 P1.3/INT0/SDA 11 P1.4/INT1 10 P1.5/RST 6 P1.6/OCB 5 P1.7/OCC/AD00 4 P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O P0.6 — Port 0 bit 6. High current source. O CMP1 — Comparator 1 output. I KBI6 — Keyboard input 6. I/O P0.7 — Port 0 bit 7. High current source. I/O T1 — ...
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... P2.7/ICA 28 P3.0 to P3.1 P3.0/XTAL2/ 9 CLKOUT P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O Port 2: Port 8-bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-up disabled ...
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... [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O P3.1 — Port 3 bit 1. I XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when selected via the flash configuration). It can be a port pin if internal RC oscillator or watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not used to generate the clock for the RTC/system timer ...
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... P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H ADCON0 A/D control 8EH ENBI0 register 0 ADCON1 A/D control 97H ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB AD1DAT0 A/D_1 data D5H register 0 AD1DAT1 A/D_1 data D6H register 1 AD1DAT2 A/D_1 data D7H register ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB DPL Data pointer 82H low FMADRH Program flash E7H address high FMADRL Program flash E6H address low ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB IEN1* Interrupt E8H EAD enable 1 Bit address BF IP0* Interrupt B8H - priority 0 IP0H Interrupt ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P1M1 Port 1 output 91H (P1M1.7) mode 1 P1M2 Port 1 output 92H (P1M2.7) mode 2 P2M1 ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SBUF Serial Port data 99H buffer register Bit address 9F SCON* Serial port 98H SM0/FE control SSTAT ...
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Table 4. Special function registers - P89LPC9331/9341 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB WDL Watchdog load C1H WFEED1 Watchdog C2H feed 1 WFEED2 Watchdog C3H feed 2 [1] All ports ...
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Table 5. Extended special function registers - P89LPC9331/9341 Name Description SFR Bit functions and addresses addr. BODCFG BOD FFC8H configuration register CLKCON CLOCK Control FFDEH CLKOK register TPSCON Temperature FFCAH sensor control register RTCDATH Real-time clock FFBFH data register high ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H ADCON0 A/D control 8EH ENBI0 register 0 ADCON1 A/D control 97H ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB AD1DAT3 A/D_1 data F5H register 3 AUXR1 Auxiliary function A2H CLKLP register Bit address ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB DIVM CPU clock 95H divide-by-M control DPTR Data pointer (2 bytes) DPH Data pointer high 83H DPL ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB ICRAH Input capture A ABH register high ICRAL Input capture A AAH register low ICRBH Input capture ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB OCRBL Output compare FAH B register low OCRCH Output compare FDH C register high OCRCL Output compare ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P3M1 Port 3 output B1H - mode 1 P3M2 Port 3 output B2H - mode 2 PCON ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SPSTAT SPI status E1H SPIF register SPDAT SPI data register E3H TAMOD Timer 0 and 1 8FH ...
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Table 6. Special function registers - P89LPC9351/9361 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB TPCR2L Prescaler control CAH TPCR2L.7 TPCR2L.6 TPCR2L.5 TPCR2L.4 TPCR2L.3 TPCR2L.2 TPCR2L.1 TPCR2L.0 00 register low TRIM Internal ...
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Table 7. Extended special function registers - P89LPC9351/9361 Name Description SFR Bit functions and addresses addr. MSB BODCFG BOD FFC8H configuration register CLKCON CLOCK FFDEH CLKOK Control register PGACON1 PGA1 control FFE1H ENPGA1 register PGACON1B PGA1 control FFE4H register B ...
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... High speed oscillator option This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic resonators are also supported in this configuration. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Figure 7) and can also be optionally divided to a slower frequency (see is defined as the OSCCLK frequency ...
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... CLKOK bit in CLKCON register is used to indicate the clock switch status. CLKOK is cleared when starting clock source switch and set when completed. Notice that when CLKOK is ‘0’, writing to CLKCON register is not allowed. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ⁄ ...
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... However, if CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to logic 1 to lower the power consumption further. On any reset, CLKLP is logic 0 allowing highest performance access. This bit can then be set in software if CCLK is running at 8 MHz or slower. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... The P89LPC9331/9341/9351/9361 supports 15 interrupt sources: external interrupts 0 and 1, timers 0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout detect, watchdog/RTC, I EEPROM write/ADC completion. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Section 7 ...
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... If an external interrupt is enabled when the P89LPC9331/9341/9351/9361 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Section 7.18 “Power reduction modes” ...
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... ENBI1 BNDI1 (2) EADEE (3) EAD (1) See Section 7.22 “CCU (P89LPC9351/9361)”. (2) P89LPC9351/9361 (3) P89LPC9331/9341 Fig 8. Interrupt sources, interrupt enables, and power-down wake-up sources P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core IE0 EX0 IE1 EX1 BOIF EBO KBIF EKBI EWDRT ...
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... The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the port driver when the port latch contains a logic used as a logic output, a port configured in this manner must have an external pull-up, typically a resistor tied to V P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... The P89LPC9331/9341/9351/9361 incorporates power monitoring functions designed to prevent incorrect operation during initial power-up and power loss or reduction during operation. This is accomplished with two hardware functions: Power-on detect and brownout detect. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Table 11 “ ...
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... SFR contents are not guaranteed after V therefore it is highly recommended to wake-up the processor via reset in this case. V must be raised to within the operating range before the Power-down mode is exited. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Table 12 “ ...
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... A Watchdog reset is similar to a power-on reset, both POF and BOF are set but the other flag bits are cleared. • For any other reset, previously set flag bits that have not been cleared will remain set. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Table 12 “ ...
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... Mode 3 it can still be used by the serial port as a baud rate generator. 7.20.5 Mode 6 In this mode, the corresponding timer can be changed to a PWM with a full period of 256 timer clocks. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... The timer is a free-running up/down counter with a direction control bit. If the timer counting direction is changed while the counter is running, the count sequence will be reversed. The timer can be written or read at any time. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... As with basic timer operation, when the PWM (compare) pins are connected to the compare logic, their logic state remains unchanged. However, since bit FCO is used to hold the halt value, only a compare event can change the state of the pin. Fig 9. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... The user will have to set a divider that scales PCLK by a factor from 1 to 16. This divider is found in the SFR register TCR21. The PLL frequency can be expressed as shown in PLL frequency Where the value of PLLDV3:0. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core TOR2 ...
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... UART, and CPU clock/32 or CPU clock/16. 7.23.1 Mode 0 Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are transmitted or received, LSB first. The baud rate is fixed at frequency. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core other ...
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... Framing error is reported in the status register (SSTAT). In addition, if SMOD0 (PCON.6) is logic 1, framing errors can be made available in SCON.7 respectively. If SMOD0 is logic 0, SCON.7 is SM0 recommended that SM0 and SM1 (SCON.7:6) are set up when SMOD0 is logic 0. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core selection” ...
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... The I A typical I device provides a byte-oriented I 400 kHz. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core bit (bit 8) in double buffering (modes 1, 2 and 3) 2 C-bus may be used for test and diagnostic purposes. ...
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... NXP Semiconductors Fig 14. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 2 I C-bus P1.3/SDA P1.2/SCL P89LPC9331/9341/ 9351/9361 2 C-bus configuration All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 January 2011 OTHER DEVICE OTHER DEVICE ...
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... NXP Semiconductors P1.3/SDA P1.2/SCL Fig 15. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core P1.3 INPUT FILTER OUTPUT STAGE INPUT FILTER OUTPUT STAGE timer 1 overflow P1.2 I2CON I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram All information provided in this document is subject to legal disclaimers. ...
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... SS is the optional slave select pin typical configuration, an SPI master asserts one of its port pins to select one SPI device as the current slave. An SPI slave device uses its SS pin to determine whether it is selected. Typical connections are shown in P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... NXP Semiconductors 7.25.1 Typical SPI configurations Fig 17. SPI single master single slave configuration Fig 18. SPI dual device configuration, where either can be a master or a slave P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT MOSI ...
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... The user should therefore disable the comparator interrupt prior to disabling the comparator. Additionally, the user should clear the comparator flag, CMFn, after disabling the comparator. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... Internal reference voltage An internal reference voltage generator may supply a default reference when a single comparator input pin is used. The value of the internal reference voltage, referred 1.23 V ± ref(bg) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core CP1 OE1 ...
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... In order to set the flag and cause an interrupt, the pattern on Port 0 must be held longer than six CCLKs. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register, without the possibility of inadvertently altering other bits in the register. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ÷ ...
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... Boot vector allows user-provided flash loader code to reside anywhere in the flash memory space, providing flexibility to the user. • Any flash program/erase operation in 2 ms. • Programming with industry-standard commercial programmers. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core as the supply voltage to perform the DD All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... IAP is performed in the application under the control of the microcontroller’s firmware. The IAP facility consists of internal hardware resources to facilitate programming and erasing. The NXP IAP has made in-application programming in an embedded application possible P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... A custom bootloader can be written with the Boot Vector set to the custom bootloader, if desired. Table 10. Device P89LPC9331 P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core shows the factory default Boot Vector setting for these devices. A Default boot vector values and ISP entry points ...
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... SAR drives a digital-to-analog converter which provides the other input to the comparator. The output of the comparator is fed to the SAR. 8.2 Features and benefits Two 8-bit, 4-channel multiplexed input, successive approximation ADCs. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... Interrupt or polled operation. Boundary limits interrupt. DAC output to a port pin with high output impedance. Clock divider. Power-down mode. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 January 2011 © ...
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... AD00 AD01 AD02 AD03 V ref(bg) V sen input MUX AD10 AD11 AD12 AD13 Fig 23. P89LPC9331/9341 ADC block diagram P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core input MUX Anin00 Anin01 Anin02 Anin03 input MUX Anin10 Anin11 Anin12 Anin13 4 All information provided in this document is subject to legal disclaimers ...
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... V reference voltage via the ADC before measuring temperature. In P89LPC9351/9361, the reference voltage, temperature sensor and AD03 input pin multiplex one input to PGA0. Please see the P89LPC9331/9341/9351/9361 User manual for detail usage of temperature sensor. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... This is a variation of the auto scan continuous conversion mode where conversion occurs on two user-selectable inputs. The result of the conversion of the first channel is placed in the result register, ADxDAT0. The result of the conversion of the second channel is placed P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... An interrupt will be generated, if enabled, if the result meets the selected interrupt criteria. The boundary limit may be disabled by clearing the boundary limit interrupt enable. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... Power-down mode or Total Power-down mode, the A/D, PGA and temperature sensor do not function. If the PGAs, temperature sensor or the A/D are enabled, they will consume power. Power can be reduced by disabling the PGA, temperature sensor and A/D. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — ...
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... Parameters are valid over ambient temperature range unless otherwise specified. All voltages are with respect to V otherwise noted. [2] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. Fig 25. Frequency vs. supply voltage P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core [1] ...
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... OL V HIGH-level output voltage OH V crystal voltage xtal V voltage on any other pin n C input capacitance iss P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified. Conditions MHz ...
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... Measured with port in high-impedance mode. [11] Port pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is highest when V is approximately P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core …continued − ...
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... Note: The graphs provided are a statistical summary based on a limited number of samples and only for information purposes. The performance characteristics listed are not tested or guaranteed. (mA) Fig 26. I (mA) Fig 27. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... NXP Semiconductors (mA) Fig 28. I (mA) Fig 29. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 2.4 2.8 Test conditions: normal mode, code while(1) {} executed from on-chip flash; using an external clock. vs. frequency at +85 °C DD(oper) 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. vs. frequency at +25 ° ...
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... NXP Semiconductors (mA) Fig 30. I (mA) Fig 31. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. ...
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... NXP Semiconductors (μA) (1) +85 °C (2) +25 °C (3) −40 °C Fig 32. I (μA) (1) +85 °C (2) −40 °C (3) +25 °C Fig 33. I P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 20 18.0 16.0 14.0 12.0 10.0 2.4 2.8 Test conditions: power-down mode, using internal RC oscillator with the following functions disabled: comparators, real-time clock, and watchdog timer ...
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... The performance characteristics listed are not tested or guaranteed. frequency deviation (%) Fig 34. Average internal RC oscillator frequency vs. V frequency deviation (%) Fig 35. Average internal RC oscillator frequency vs. V P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 0.2 0.1 0 −0.1 −0.2 2.4 2 ...
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... NXP Semiconductors frequency deviation (%) Fig 36. Average internal RC oscillator frequency vs. V frequency deviation (%) Fig 37. Average watchdog oscillator frequency vs. V P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 0.2 0 −0.2 −0.4 −0.6 2.4 2.8 Central frequency of internal RC oscillator = 7.3728 MHz 2.5 1.5 0.5 −0.5 −1.5 2 ...
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... NXP Semiconductors frequency deviation (%) Fig 38. Average watchdog oscillator frequency vs. V frequency deviation (%) Fig 39. Average watchdog oscillator frequency vs. V P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 0.5 −0.5 −1.5 −2.5 −3.5 2.4 2.8 Central frequency of watchdog oscillator = 400 KHz 1.5 0.5 −0.5 − ...
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... BOD EEPROM/FLASH V trip voltage trip [1] Typical ratings are not guaranteed. The values listed are at room temperature Fig 40. BOD interrupt/reset characteristics P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified ...
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... XHDV rising edge time SPI interface f SPI operating frequency SPI slave master P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified. Conditions nominal ...
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... SPI inputs (SPICLK, MOSI, MISO, SS) [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core …continued − ...
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... SPI interface f SPI operating frequency SPI slave master T SPI cycle time SPICYC slave master P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified. Conditions nominal f = 7.3728 MHz trimmed to ± ...
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... SPI inputs (SPICLK, MOSI, MISO, SS) [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core …continued − ...
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... RI Fig 42. Shift register mode timing SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t MOSI SPIF (output) Fig 43. SPI master timing (CPHA = 0) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core t t CHCL CLCX i(RMS) T XLXL t XHQX ...
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... SS t SPIF t SPILEAD SPICLK (CPOL = 0) (input) t SPICLK (CPOL = 1) (input) t SPIA MISO (output) t SPIDSU MOSI (input) Fig 45. SPI slave timing (CPHA = 0) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core T SPICYC t t SPIF SPIR t SPICLKL t SPICLKH t SPIF t SPICLKL t SPICLKH t ...
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... C for industrial applications, amb Symbol Parameter t V active to RST active delay VR DD time t RST HIGH time RH t RST LOW time RL Fig 47. ISP entry waveform P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core T SPICYC t t SPIF SPIR t SPICLKL t SPICLKH t SPIR t ...
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... I input leakage current LI [1] This parameter is characterized, but not tested in production. P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified. ...
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... V nominal output offset voltage offset(O)(nom) temperature sensor V sensor voltage sen TC temperature coefficient t start-up time startup P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core − ° ° +125 C extended, unless otherwise specified. Ω . Conditions 0 kHz to 100 kHz ...
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... NXP Semiconductors start trigger 1 2 adc_clk clk serial_data_out ADCDATA_REG Fig 48. ADC conversion timing P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core All information provided in this document is subject to legal disclaimers. Rev. 5 — 10 January 2011 ...
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... E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. Fig 49. ADC characteristics P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core (2) 1 LSB (ideal (LSB ) IA ideal All information provided in this document is subject to legal disclaimers. ...
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... Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION IEC SOT261-2 112E08 Fig 50. PLCC28 package outline (SOT261-2) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT361-1 Fig 51. TSSOP package outline (SOT361-1) P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... PGA PLL PWM RAM RC RTC SAR SFR SPI UART WDT P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Abbreviations Description Analog to Digital Converter Central Processing Unit Capture/Compare Unit Cyclic Redundancy Check Digital to Analog Converter Erasable Programmable Read-Only Memory ...
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... Modifications: P89LPC9331_9341_9351_ 20100910 9361 v.4 P89LPC9331_9341_9351_ 20090602 9361 v.3 P89LPC9331_9341_9351 v.2 20090505 P89LPC9351 v.1 20081119 P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Data sheet status Product data sheet • Table 12 “Static characteristics”: Added V • Section 7.19 “Reset”: Added sentence “When this pin functions as a reset input...”. ...
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... Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s 17. Contact information For more information, please visit: For sales office addresses, please send an email to: P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... Port 0 analog functions . . . . . . . . . . . . . . . . . . 37 7.16.3 Additional port features 7.17 Power monitoring functions . . . . . . . . . . . . . . 37 7.17.1 Brownout detection . . . . . . . . . . . . . . . . . . . . . 38 7.17.2 Power-on detection 7.18 Power reduction modes . . . . . . . . . . . . . . . . . 38 7.18.1 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.18.2 Power-down mode . . . . . . . . . . . . . . . . . . . . . 38 P89LPC9331_9341_9351_9361 Product data sheet P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core 7.18.3 Total Power-down mode . . . . . . . . . . . . . . . . 39 7.19 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7.19.1 Reset vector 7.20 Timers/counters 0 and 7.20.1 Mode 7.20.2 Mode 1 ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 10 January 2011 Document identifier: P89LPC9331_9341_9351_9361 ...