XA-S3 NXP Semiconductors, XA-S3 Datasheet - Page 8

• Manufacturer Part Number: XA-S3
• Description: The XA-S3 device is a member of Philips Semiconductors? XA(eXtended Architecture) family of high performance 16-bitsingle-chip microcontrollers
• Manufacturer: NXP Semiconductors

Philips Semiconductors
2000 Dec 01
MNEMONIC
MNEMONIC
P1.0 – P1.7
P2.0 – P2.7
P3.0 – P3.7
P4.0 – P4.7
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
2
C, 2 UARTs, 16 MB address range
PLCC
35–42
59–66
11–18
3–10
PIN NUMBER
35
36
37
38
39
40
41
42
11
12
13
14
15
16
17
18
10
3
4
5
6
7
8
9
73–79, 2
58, 59,
32–39
61–66
LQFP
3–10
32
33
34
35
36
37
38
39
10
73
74
75
76
77
78
79
3
4
5
6
7
8
9
2
TYPE
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type. Port 1 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 1 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 1 also provides various special functions as described below:
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. Port 2 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 2 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
When the external program/data bus is used in 16-bit mode, Port 2 becomes the
multiplexed high data/instruction byte and address lines 12 through 19. When the external
data/address bus is used in 8-bit mode, the number of address lines that appear on Port 2
is user programmable in groups of 4 bits.
Port 3: Port 3 is an 8-bit I/O port with a user-configurable output type. Port 3 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 3 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 3 also provides the various special functions as described below:
Port 4: Port 4 is an 8-bit I/O port with a user-configurable output type. Port 4 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 4 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 4 also provides various special functions as described below:
A0/WRH (P1.0)
A1 (P1.1):
A2 (P1.2):
A3 (P1.3):
RxD1 (P1.4):
TxD1 (P1.5):
T2 (P1.6):
T2EX (P1.7):
RxD0 (P3.0):
TxD0 (P3.1):
INT0 (P3.2):
INT1 (P3.3):
T0 (P3.4):
T1 / BUSW (P3.5):
WRL (P3.6):
RD (P3.7):
ECI (P4.0):
CEX0 (P4.1):
CEX1 (P4.2):
CEX2 (P4.3):
CEX3 (P4.4):
CEX4 (P4.5):
A20 (P4.6):
A21 (P4.7):
8
Address bit 0 of the external address bus when the eternal data
bus is configured for an 8-bit width. When the external data bus
is configured for a 16-bit width, this pin becomes the high byte
write strobe.
Address bit 1 of the external address bus.
Address bit 2 of the external address bus.
Address bit 3 of the external address bus.
Serial port 1 receiver input.
Serial port 1 transmitter output.
Timer/counter 2 external count input or overflow output.
Timer/counter 2 reload/capture/direction control.
Receiver input for serial port 0.
Transmitter output for serial port 0.
External interrupt 0 input.
External interrupt 1 input.
Timer/counter 0 external count input or overflow output.
Timer/counter 1 external count input or overflow output. The
value on this pin is latched as an external chip reset is
completed and defines the default external data bus width.
External data memory low byte write strobe.
External data memory read strobe.
PCA External clock input.
Capture/compare external I/O for PCA module 0.
Capture/compare external I/O for PCA module 1.
Capture/compare external I/O for PCA module 2.
Capture/compare external I/O for PCA module 3.
Capture/compare external I/O for PCA module 4.
Address bit 20 of the external address bus.
Address bit 21 of the external address bus.
NAME AND FUNCTION
NAME AND FUNCTION
Preliminary specification
XA-S3