STM32F105V8 STMicroelectronics, STM32F105V8 Datasheet - Page 96

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STM32F105V8

Manufacturer Part Number
STM32F105V8
Description
Mainstream Connectivity line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, CAN, USB 2.0 OTG
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F105V8

Core
ARM 32-bit Cortex™-M3 CPU
Conversion Range
0 to 3.6 V
Dma
12-channel DMA controller
Supported Peripherals
timers, ADCs, DAC, I2Ss, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter
10/100 Ethernet Mac With Dedicated Dma And Sram (4 Kbytes)
IEEE1588 hardware support, MII/RMII available on all packages

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0
Application block diagrams
A.4
96/104
USB OTG FS interface + Ethernet/I
With the clock tree implemented on the STM32F107xx, only one crystal is required to work
with both the USB (host/device/OTG) and the Ethernet (MII/RMII) interfaces.
illustrate the solution.
Figure 55. USB OTG FS + Ethernet solution
With the clock tree implemented on the STM32F107xx, only one crystal is required to work
with both the USB (host/device/OTG) and the I
solution.
Figure 56. USB OTG FS + I
25 MHz
Ethernet
XTAL
14.7456 MHz
PHY
Ethernet
PHY
XTAL
MCO
MCO
Div
by 4
Sel
Div
by 5
2
Doc ID 15274 Rev 6
S (Audio) solution
PLL2MUL
PLL3MUL
Sel
x20
PLL2MUL
PLL3MUL
x8
Sel
Up to 50 MHz
x10
x8
Div
by 4
STM32F105 /STM32F107MCU
PLL3VCO
(2 xPLL3CLK
Div
by 5
Up to 147.456 MHz
STM32F107 MCU
PLLMUL
2
x6.5
S (Audio) interfaces.
PLLMUL
x9
2
S interface solutions
Up to 71.88 MHz
PLLVCO
(2 xPLLCLK
Up to 72 MHz
PLLVCO
(2 xPLLCLK
Div
by 3
STM32F105xx, STM32F107xx
Div
by 3
47.9232 MHz
0.16% accuracy
Less than 0.5% accuracy
on MCLK and SCLK
OTG
I2S
Figure 56
48 MHz
SYSCLK
OTG
I2S
SYSCLK
Figure 55
2% accuracy
illustrate the
USB
PHY
USB
PHY
MCLK
SCLK

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