STM32F105VC STMicroelectronics, STM32F105VC Datasheet - Page 53

• Manufacturer Part Number: STM32F105VC
• Description: Mainstream Connectivity line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, CAN, USB 2.0 OTG
• Manufacturer: STMicroelectronics

Specifications of STM32F105VC

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Dma: 12-channel DMA controller
• Supported Peripherals: timers, ADCs, DAC, I2Ss, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter
• 10/100 Ethernet Mac With Dedicated Dma And Sram (4 Kbytes): IEEE1588 hardware support, MII/RMII available on all packages

STM32F105xx, STM32F107xx
Functional EMS (electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the
device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
●
●
A device reset allows normal operations to be resumed.
The test results are given in
defined in application note AN1709.
Table 31.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
●
●
●
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1
second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring (see application note AN1015).
V
V
Symbol
FESD
EFTB
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant
with the IEC 61000-4-4 standard.
Corrupted program counter
Unexpected reset
Critical Data corruption (control registers...)
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
Fast transient voltage burst limits to be
applied through 100 pF on V
pins to induce a functional disturbance
EMS characteristics
Parameter
Table
Doc ID 15274 Rev 6
31. They are based on the EMS levels and classes
DD
and V
SS
V
f
IEC 61000-4-2
V
f
IEC 61000-4-2
HCLK
HCLK
DD
DD
= 3.3 V, LQFP100, T
= 3.3 V, LQFP100, T
= 75 MHz, conforms to
= 75 MHz, conforms to
Conditions
Electrical characteristics
A
A
= +25 °C,
= +25 °C,
DD
and V
Level/
Class
53/104
2B
4A
SS