STM32F103T8 STMicroelectronics, STM32F103T8 Datasheet - Page 69

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STM32F103T8

Manufacturer Part Number
STM32F103T8
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103T8

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, SPIs, I2Cs and USARTs
STM32F103x8, STM32F103xB
SPI interface characteristics
Unless otherwise specified, the parameters given in
performed under the ambient temperature, f
conditions summarized in
Refer to
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 42.
1. Based on characterization, not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
DuCy(SCK)
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
t
Symbol
t
t
t
h(NSS)
t
t
t
su(MI)
t
v(SO)
v(MO)
h(MO)
su(SI)
h(SO)
t
h(MI)
t
the data.
the data in Hi-Z
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(1)(2)
(1)
(1)(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Section 5.3.12: I/O current injection characteristics
SPI clock frequency
SPI clock rise and fall
time
SPI slave input clock
duty cycle
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access
time
Data output disable
time
Data output valid time Slave mode (after enable edge)
Data output valid time Master mode (after enable edge)
Data output hold time
SPI characteristics
Parameter
Table
Doc ID 13587 Rev 13
9.
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Slave mode
Master mode, f
presc = 4
Master mode
Slave mode
Master mode
Slave mode
Slave mode, f
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
PCLKx
Conditions
PCLK
PCLK
frequency and V
= 20 MHz
= 36 MHz,
Table 42
for more details on the
are derived from tests
Electrical characteristics
DD
4t
2t
Min
PCLK
PCLK
30
15
supply voltage
50
5
5
5
4
2
2
0
3t
Max
PCLK
18
70
60
10
25
18
5
8
MHz
Unit
69/99
ns
ns
%

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