STM32F103T8

Manufacturer Part NumberSTM32F103T8
DescriptionMainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
ManufacturerSTMicroelectronics
STM32F103T8 datasheet
 

Specifications of STM32F103T8

Conversion Range0 to 3.6 VPeripherals Supportedtimers, ADC, SPIs, I2Cs and USARTs
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STM32F103x8, STM32F103xB
5.3.18
12-bit ADC characteristics
Unless otherwise specified, the parameters given in
performed under the ambient temperature, f
conditions summarized in
Note:
It is recommended to perform a calibration after each power-up.
Table 46.
ADC characteristics
Symbol
Parameter
V
Power supply
DDA
V
Positive reference voltage
REF+
I
Current on the V
VREF
REF
f
ADC clock frequency
ADC
(2)
Sampling rate
f
S
(2)
External trigger frequency
f
TRIG
(3)
Conversion voltage range
V
AIN
(2)
R
External input impedance
AIN
(2)
Sampling switch resistance
R
ADC
Internal sample and hold
(2)
C
ADC
capacitor
(2)
t
Calibration time
CAL
Injection trigger conversion
(2)
t
lat
latency
Regular trigger conversion
(2)
t
latr
latency
(2)
t
Sampling time
S
(2)
t
Power-up time
STAB
Total conversion time
(2)
t
CONV
(including sampling time)
1. Based on characterization, not tested in production.
2. Guaranteed by design, not tested in production.
3. In devices delivered in VFQFPN and LQFP packages, V
connected to V
. Devices that come in the TFBGA64 package have a V
SSA
connected to V
), see
Table 5
SSA
4. For external triggers, a delay of 1/f
PCLK2
Table
9.
Conditions
input pin
f
= 14 MHz
ADC
See
Equation 1
and
Table 47
for details
f
= 14 MHz
ADC
f
= 14 MHz
ADC
f
= 14 MHz
ADC
f
= 14 MHz
ADC
f
= 14 MHz
ADC
is internally connected to V
REF+
and
Figure
6.
must be added to the latency specified in
PCLK2
Doc ID 13587 Rev 13
Electrical characteristics
Table 46
are derived from tests
frequency and V
supply voltage
DDA
Min
Typ
Max
2.4
3.6
2.4
V
DDA
(1)
160
220
0.6
14
0.05
823
17
0 (V
or V
SSA
REF-
V
REF+
tied to ground)
50
5.9
83
0.214
3
0.143
2
0.107
17.1
1.5
239.5
0
0
1
18
14 to 252 (t
for sampling +12.5 for
S
successive approximation)
and V
is internally
DDA
REF-
pin but no V
pin (V
is internally
REF+
REF-
REF-
Table
46.
Unit
V
V
(1)
µA
MHz
1
MHz
kHz
1/f
ADC
V
1
8
pF
µs
1/f
ADC
µs
(4)
1/f
ADC
µs
(4)
1/f
ADC
µs
1/f
ADC
1
µs
µs
1/f
ADC
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