STM32F103T8

Manufacturer Part NumberSTM32F103T8
DescriptionMainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
ManufacturerSTMicroelectronics
STM32F103T8 datasheet
 

Specifications of STM32F103T8

Conversion Range0 to 3.6 VPeripherals Supportedtimers, ADC, SPIs, I2Cs and USARTs
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STM32F103x8, STM32F103xB
Table 60.
Document revision history (continued)
Date
Revision
23-Apr-2009
22-Sep-2009
03-Jun-2010
I/O information clarified
on page
Figure 3: STM32F103xx performance line LFBGA100 ballout
Figure 10: Memory map
added.
PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default
column to Remap column in
pin
definitions.
P
for LFBGA100 corrected in
D
Note modified in
Table 13: Maximum current consumption in Run
10
mode, code with data processing running from Flash
Maximum current consumption in Sleep mode, code running from
Flash or
RAM.
Table 20: High-speed external user clock characteristics
Low-speed external user clock characteristics
Figure 19
shows a typical curve (title modified). ACC
modified in
Table 24: HSI oscillator
TFBGA64 package added (see
changes.
Note 5
updated and
Note 4
STM32F103xx pin
definitions.
V
and T
added to
RERINT
Coeff
voltage. I
value added to
DD_VBAT
current consumptions in Stop and Standby
current consumption on VBAT with RTC on versus temperature at
different VBAT values
added.
f
min modified in
Table 20: High-speed external user clock
HSE_ext
characteristics.
C
and C
replaced by C in
L1
L2
characteristics
and
Table 23: LSE oscillator characteristics (fLSE =
32.768
kHz), notes modified and moved below the tables.
11
oscillator characteristics
Low-power mode wakeup
Note 1
modified below
Figure 23: Typical application with an 8 MHz
crystal.
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in
Section 5.3.10: EMC characteristics on page
Jitter added to
Table 27: PLL
Table 42: SPI characteristics
C
and R
parameters modified in
ADC
AIN
R
max values modified in
AIN
Figure 44: LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array
package outline
updated.
Added STM32F103TB devices.
Added VFQFPN48 package.
Updated note 2 below
Table 40: I2C characteristics
12
Updated
Figure 31: I2C bus AC waveforms and measurement circuit
Updated
Figure 30: Recommended NRST pin protection
Updated
Section 5.3.12: I/O current injection characteristics
Doc ID 13587 Rev 13
Revision history
Changes
1.
modified.
Table 4: Timer feature comparison
Table 5: Medium-density STM32F103xx
Table 9: General operating
and
and
modified.
max values
HSI
characteristics.
Table 56
and
Table
50). Small text
added in
Table 5: Medium-density
Table 12: Embedded internal reference
Table 16: Typical and maximum
modes.
Figure 17: Typical
Table 22: HSE 4-16 MHz oscillator
Table 24: HSI
modified. Conditions removed from
timings.
characteristics.
modified.
Table 46: ADC
characteristics.
Table 47: RAIN max for fADC = 14
modified.
conditions.
Table 15:
Table 21:
Table 26:
56.
MHz.
97/99