STM32F101VD STMicroelectronics, STM32F101VD Datasheet - Page 89

• Manufacturer Part Number: STM32F101VD
• Description: Mainstream Access line, ARM Cortex-M3 MCU with 384 Kbytes Flash, 36 MHz CPU
• Manufacturer: STMicroelectronics

Specifications of STM32F101VD

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, DAC, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

STM32F101xC, STM32F101xD, STM32F101xE
SPI interface characteristics
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
summarized in
Refer to
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 53.
1. Based on characterization, not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
t
Symbol
t
t
t
h(NSS)
t
t
t
su(MI)
t
v(SO)
v(MO)
h(MO)
su(SI)
h(SO)
t
h(MI)
t
the data.
the data in Hi-Z
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(1)(2)
(1)
(1)(3)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Section 5.3.13: I/O current injection characteristics
SPI clock frequency
SPI clock rise and
fall time
NSS setup time
NSS hold time
SCK high and low
time
Data input setup
time
Data input hold time
Data output access
time
Data output disable
time
Data output valid
time
Data output valid
time
Data output hold
time
STM32F10xxx SPI characteristics
Table
Parameter
10.
Doc ID 14610 Rev 8
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Master mode, f
presc = 4
Master mode - SPI1
Master mode - SPI2
Slave mode
Master mode - SPI1
Master mode - SPI2
Slave mode
Slave mode, f
presc = 4
Slave mode, f
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
PCLKx
Conditions
PCLK
PCLK
PCLK
frequency and V
= 20 MHz
= 36 MHz,
= 36 MHz,
Table 53Table 54
for more details on the
DD
Electrical characteristics
supply voltage conditions
4t
Min
PCLK
73
25
50
10
3
5
4
4
6
5
0
6
are derived from tests
4t
Max
10
10
60
55
25
PCLK
8
6
89/112
MHz
Unit
ns