STM32F101VD STMicroelectronics, STM32F101VD Datasheet - Page 98

• Manufacturer Part Number: STM32F101VD
• Description: Mainstream Access line, ARM Cortex-M3 MCU with 384 Kbytes Flash, 36 MHz CPU
• Manufacturer: STMicroelectronics

Specifications of STM32F101VD

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, DAC, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

Electrical characteristics
Table 59.
1. Based on characterization, not tested in production.
2. Guaranteed by design, not tested in production.
98/112
I
I
DNL
INL
Offset
Gain error
t
Update rate
t
PSRR+
DDVREF+
DDA
SETTLING
WAKEUP
Symbol
(1)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
DAC characteristics (continued)
DAC DC current consumption
in quiescent mode (Standby
mode)
DAC DC current consumption
in quiescent mode (Standby
mode)
Differential non linearity
Difference between two
consecutive code-1LSB)
Integral non linearity (difference
between measured value at
Code i and the value at Code i
on a line drawn between Code
0 and last Code 1023)
Offset error
(difference between measured
value at Code (0x800) and the
ideal value = V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final value
±1LSB
Max frequency for a correct
DAC_OUT change when small
variation in the input code (from
code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the DAC
Control register)
Power supply rejection ratio (to
V
DDA
) (static DC measurement
Parameter
REF+
/2)
Doc ID 14610 Rev 8
Min
3
6.5
–67
Typ
STM32F101xC, STM32F101xD, STM32F101xE
220
380
480
±0.5
±2
±1
±4
±10
±3
±12
±0.5
4
1
10
–40
Max
(1)
µA
µA
µA
LSB
LSB
LSB
LSB
mV
LSB
LSB
%
µs
MS/s C
µs
dB
Unit
With no load, worst code
(0xF1C) at V
terms of DC consumption on
the inputs.
With no load, middle code
(0x800) on the inputs.
With no load, worst code
(0xF1C) at V
terms of DC consumption on
the inputs.
Given for the DAC in 10-bit
configuration.
Given for the DAC in 12-bit
configuration.
Given for the DAC in 10-bit
configuration.
Given for the DAC in 12-bit
configuration.
Given for the DAC in 12-bit
configuration.
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12bit
configuration.
C
C
input code between lowest and
highest possible ones.
No R
REF+
REF+
LOAD
LOAD
LOAD
LOAD
= 3.6 V.
= 3.6 V.
≤ 50 pF, R
≤ 50 pF, R
≤ 50 pF, R
Comments
, C
REF+
REF+
LOAD
LOAD
LOAD
LOAD
= 3.6 V in
= 3.6 V in
= 50 pF
≥ 5 kΩ
≥ 5 kΩ
≥ 5 kΩ