STM32F103ZC

Manufacturer Part NumberSTM32F103ZC
DescriptionMainstream Performance line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
ManufacturerSTMicroelectronics
STM32F103ZC datasheet
 

Specifications of STM32F103ZC

CoreARM 32-bit Cortex™-M3 CPUConversion Range0 to 3.6 V
Dma12-channel DMA controllerSupported Peripheralstimers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timera 24-bit downcounter  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
Page 61
62
Page 62
63
Page 63
64
Page 64
65
Page 65
66
Page 66
67
Page 67
68
Page 68
69
Page 69
70
Page 70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
Page 63/130

Download datasheet (2Mb)Embed
PrevNext
STM32F103xC, STM32F103xD, STM32F103xE
Table 30.
Flash memory endurance and data retention
Symbol
Parameter
N
Endurance
END
t
Data retention
RET
1. Based on characterization not tested in production.
2. Cycling performed over the whole temperature range.
5.3.10
FSMC characteristics
Asynchronous waveforms and timings
Figure 24
through
Table 34
provide the corresponding timings. The results shown in these tables are obtained
with the following FSMC configuration:
AddressSetupTime = 0
AddressHoldTime = 1
DataSetupTime = 1
Conditions
T
= –40 to +85 °C (6 suffix versions)
A
T
= –40 to +105 °C (7 suffix versions)
A
(2)
1 kcycle
at T
= 85 °C
A
(2)
1 kcycle
at T
= 105 °C
A
(2)
10 kcycles
at T
= 55 °C
A
Figure 27
represent asynchronous waveforms and
Doc ID 14611 Rev 8
Electrical characteristics
Value
Unit
(1)
Min
kcycles
10
30
10
Years
20
Table 31
through
63/130