STM32F101RG STMicroelectronics, STM32F101RG Datasheet - Page 58

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STM32F101RG

Manufacturer Part Number
STM32F101RG
Description
Mainstream Access line, ARM Cortex-M3 MCU with 1 Mbyte Flash, 36 MHz CPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F101RG

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, DAC, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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Electrical characteristics
58/108
Figure 21. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 31.
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NOE_NE)
w(NOE)
h(NE_NOE)
v(A_NE)
h(A_NOE)
v(BL_NE)
h(BL_NOE)
su(Data_NE)
su(Data_NOE)
h(Data_NOE)
h(Data_NE)
Symbol
Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time –1.5
FSMC_NEx low to FSMC_A valid
Address hold time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NOE high
Data to FSMC_NEx high setup time
Data to FSMC_NOEx high setup time
Data hold time after FSMC_NOE high
Data hold time after FSMC_NEx high
Parameter
Doc ID 17143 Rev 2
5T
0.5
5T
0.1
0
2T
2T
0
0
HCLK
HCLK
HCLK
HCLK
STM32F101xF, STM32F101xG
Min
– 1.5
– 1.5
+ 25
+ 25
5T
1.5
5T
7
0
HCLK
HCLK
Max
+ 2
+ 1.5
(1) (2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit

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