STM32F101RG STMicroelectronics, STM32F101RG Datasheet - Page 83

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STM32F101RG

Manufacturer Part Number
STM32F101RG
Description
Mainstream Access line, ARM Cortex-M3 MCU with 1 Mbyte Flash, 36 MHz CPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F101RG

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, DAC, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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STM32F101xF, STM32F101xG
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 47.
1. The I
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
4. Based on characterization data, not tested in production.
Symbol
V
V
V
V
V
V
V
V
OH
OH
OH
OH
OL
OL
OL
OL
and the sum of I
Table 8
(1)
(1)
(1)
(1)
(3)
(3)
(3)
(3)
10. All I/Os are CMOS and TTL compliant.
IO
IO
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output voltage characteristics
IO
(I/O ports and control pins) must not exceed I
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 17143 Rev 2
DD
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
I
CMOS port
IO
I
Table 47
IO
I
Conditions
I
IO
TTL port
IO
= +20 mA
= +6 mA
VSS
= +8 mA,
= +8 mA
DD
DD
DD
DD
.
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
(2)
VDD
are derived from tests
(2)
(4)
(4)
,
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 8
83/108
Unit
V
V
V
V

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