STM32F101RG STMicroelectronics, STM32F101RG Datasheet - Page 96

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STM32F101RG

Manufacturer Part Number
STM32F101RG
Description
Mainstream Access line, ARM Cortex-M3 MCU with 1 Mbyte Flash, 36 MHz CPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F101RG

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, DAC, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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Electrical characteristics
96/108
Figure 50. Typical connection diagram using the ADC
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown in
depending on whether V
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 51. Power supply and reference decoupling (V
1. V
pad capacitance (roughly 7 pF). A high C
this, f
REF+
parasitic
ADC
and V
Table 55
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
should be reduced.
V AIN
REF-
1 µF // 10 nF
inputs are available only on 100-pin packages.
for the values of R
R AIN (1)
REF+
C parasitic
AINx
is connected to V
Doc ID 17143 Rev 2
AIN
1 µF // 10 nF
, R
parasitic
ADC
V DD
and C
0.6 V
0.6 V
value will downgrade conversion accuracy. To remedy
V T
V T
ADC
DDA
.
I L ±1 µA
or not. The 10 nF capacitors should be
V REF+
V DDA
V SSA /V REF-
STM32F10xxx
Sample and hold ADC
converter
R ADC (1)
REF+
Figure 51
STM32F101xF, STM32F101xG
not connected to
C ADC (1)
converter
12-bit
STM32F10xxx
or
Figure
ai14380b
52,
V
ai14139d
DDA
)

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