STM32F103VF STMicroelectronics, STM32F103VF Datasheet - Page 64

• Manufacturer Part Number: STM32F103VF
• Description: Mainstream Performance line, ARM Cortex-M3 MCU with 768 Kbytes Flash, 72MHz CPU, motor control, USB and CAN
• Manufacturer: STMicroelectronics

Specifications of STM32F103VF

• Conversion Range: 0 to 3.6 V
• Supported Peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

Electrical characteristics
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Table 32.
1. C
Table 33.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NWE_NE)
w(NWE)
h(NE_NWE)
v(A_NE)
h(A_NWE)
v(BL_NE)
h(BL_NWE)
v(Data_NE)
h(Data_NWE)
v(NADV_NE)
w(NADV)
w(NE)
v(NOE_NE)
w(NOE)
h(NE_NOE)
v(A_NE)
v(NADV_NE)
w(NADV)
h(AD_NADV)
h(A_NOE)
h(BL_NOE)
v(BL_NE)
su(Data_NE)
su(Data_NOE)
h(Data_NE)
h(Data_NOE)
Symbol
Symbol
L
= 15 pF.
Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
Asynchronous read muxed
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low time
FSMC_NWE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE high
FSMC_NEx low to Data valid
Data hold time after FSMC_NWE high
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD (address) valid hold time after
FSMC NADV high
Address hold time after FSMC_NOE high
FSMC_BL time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
Data to FSMC_NEx high setup time
Data to FSMC_NOE high setup time
Data hold time after FSMC_NEx high
Data hold time after FSMC_NOE high
Parameter
Parameter
Doc ID 16554 Rev 3
7t
4t
3t
3t
4t
t
t
t
t
t
4t
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
STM32F103xF, STM32F103xG
HCLK
t
HCLK
HCLK
HCLK
HCLK
HCLK
t
t
t
HCLK
HCLK
HCLK
Min
Min
0.5
0.5
0
0
0
-
-
-
-
-
-
-
+ 0.5
– 1
+ 0.5
– 0.5
– 0.5
– 1.5
+ 0.5
+ 0.5
+ 0.5
– 0.5
– 2
– 1
7t
4t
3t
3t
t
t
HCLK
HCLK
HCLK
HCLK
t
t
HCLK
HCLK
HCLK
HCLK
t
Max
Max
HCLK
1.5
0
0
0
1
0
-
-
-
-
-
-
-
-
-
-
-
-
+ 1.5
+ 1.5
+ 2
+ 1
+ 1.5 ns
+ 1.5
+ 1
+ 2
(1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Unit