STM32F100RB STMicroelectronics, STM32F100RB Datasheet - Page 70

• Manufacturer Part Number: STM32F100RB
• Description: Mainstream Value line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 24 MHz CPU, motor control and CEC functions
• Manufacturer: STMicroelectronics

Specifications of STM32F100RB

• Peripherals Supported: timers, ADC, SPIs, I2Cs, USARTs and DACs
• Conversion Range: 0 to 3.6 V
• 16-bit, 6-channel Advanced-control Timer: up to 6 channels for PWM output, dead time generation and emergency stop
• Systick Timer: 24-bit downcounter

Electrical characteristics
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add a Schottky diode (pin to ground) to standard analog pins which may potentially inject
negative currents.
Any positive injection current within the limits specified for I
Section 5.3.12
Figure 32. ADC accuracy characteristics
Figure 33. Typical connection diagram using the ADC
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown in
depending on whether V
ceramic (good quality). They should be placed them as close as possible to the chip.
4095
4094
4093
pad capacitance (roughly 7 pF). A high C
this, f
7
6
5
4
3
2
1
parasitic
0
V
SSA
[1LSB
ADC
1
V AIN
Table 42
E
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
should be reduced.
IDEAL
O
2
does not affect the ADC accuracy.
=
V
R AIN (1)
4096
3
REF+
for the values of R
4
(or
C parasitic
V
5
REF+
1 LSB
4096
AINx
DDA
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
E
6
T
depending on package)]
IDEAL
is connected to V
Doc ID 16455 Rev 6
E
7
L
AIN
(2)
, R
V DD
parasitic
ADC
E
D
0.6 V
0.6 V
V T
V T
4093 4094 4095 4096
and C
(3)
value will downgrade conversion accuracy. To remedy
ADC
(1)
DDA
I L ±1 µA
.
E
G
or not. The 10 nF capacitors should be
V
DDA
Sample and hold ADC
converter
R ADC (1)
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Differential Linearity Error: maximum deviation
INJ(PIN)
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
Figure 34
C ADC (1)
converter
12-bit
STM32F10xxx
and ΣI
or
Figure
INJ(PIN)
ai14139d
35,
in
ai14395b