STM32L162RD STMicroelectronics, STM32L162RD Datasheet

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STM32L162RD

Manufacturer Part Number
STM32L162RD
Description
Ultra-low-power ARM Cortex-M3 MCU with 384 Kbytes Flash, 32 MHz CPU, LCD, USB, 3xOp-amp, AES
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32L162RD

Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V
7 Modes
Sleep, Low-power run (11 μA at 32 kHz), Low-power sleep (4.4 μA), Stop with RTC, Stop (650 nA), Standby with RTC, Standby (300 nA)
Ultralow Leakage Per I/o
50 nA max
Fast Wakeup Time From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
12-channel DMA controller
11 Timers
one 32-bit and six 16-bit general-purpose timers, two 16-bit basic timers, two watchdog timers (independent and window)

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RTC, AES, LCD, USB, USART/I2C/SPI, timers, ADC, DAC, COMPs
Features
February 2012
Operating conditions
– Operating power supply range: 1.65 V to
Low power features
– 7 modes: Sleep, Low-power run (11 µA at
– Dynamic core voltage scaling down to
– Ultralow leakage per I/O: 50 nA max
– Fast wakeup time from Stop: 8 µs
– Three wakeup pins
Core: ARM 32-bit Cortex
– 32 MHz maximum frequency,
– Memory protection unit
Reset and supply management
– Low power, ultrasafe BOR (brownout reset)
– Ultralow power POR/PDR
– Programmable voltage detector (PVD)
Clock management
– 1 to 24 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– Internal 16 MHz factory-trimmed RC
– Internal 37 kHz low consumption RC
– Internal multispeed low power RC, 65 kHz
– PLL for CPU clock and USB (48 MHz)
Memories
– 384 Kbytes of Flash memory with ECC,
– 12 Kbytes of data EEPROM with ECC
– NVM in 2 banks enabling Read While Write
– 48 Kbytes of RAM
– Flexible static memory controller that
3.6 V (without BOR) or 1.8 V to 3.6 V
32 kHz), Low-power sleep (4.4 µA), Stop
with RTC, Stop (650 nA), Standby with
RTC, Standby (300 nA)
233 µA/MHz
33.3 DMIPS peak (Dhrystone 2.1)
to 4.2 MHzz
split into two banks allowing Read While
Write
supports SRAM, PSRAM and NOR Flash
Ultralow power ARM-based 32-bit MCU with 384 Kbytes Flash,
-M3 CPU
STM32L162QD STM32L162RD
STM32L162VD STM32L162ZD
Doc ID 022268 Rev 2
AES encryption hardware accelerator
Low power calendar RTC
– Alarm, periodic wakeup from Stop/Standby
Up to 116 fast I/Os (102 of which are 5 V-
tolerant)
DMA: 12-channel DMA controller
LCD 8 × 40 or 4 × 44 with step-up converter
3 operational amplifiers
12-bit ADC up to 1 Msps and 40 channels
– Operational amplifier output, temperature
– Operates down to 1.8 V
Two 12-bit DACs with output buffers
Two ultralow power comparators
– Window mode and wakeup capability
11 timers: one 32-bit and six 16-bit general-
purpose timers, two 16-bit basic timers, two
watchdog timers (independent and window)
Up to 12 communication interfaces
– Up to two I2C interfaces (SMBus/PMBus)
– Up to five USARTs
– Up to three SPIs (16 Mbit/s), two with I2S
– USB 2.0 full-speed interface
– SDIO interface
Up to 36 capacitive sensing channels
supporting touch, proximity, linear and rotary
sensors
32-bit CRC calculation unit, 96-bit unique ID
UFBGA132 (7 × 7 mm)
sensor and internal voltage reference
LQFP144 (20 × 20 mm)
LQFP100 (14 × 14 mm)
LQFP64 (10 × 10 mm)
WLCSP64 (0.400 mm pitch)
www.st.com
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STM32L162RD Summary of contents

Page 1

... NVM in 2 banks enabling Read While Write – 48 Kbytes of RAM – Flexible static memory controller that supports SRAM, PSRAM and NOR Flash February 2012 STM32L162VD STM32L162ZD STM32L162QD STM32L162RD ■ AES encryption hardware accelerator ■ Low power calendar RTC – Alarm, periodic wakeup from Stop/Standby ■ ...

Page 2

... Operational amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.14 Ultralow power comparators and reference voltage . . . . . . . . . . . . . . . . . 22 3.15 System configuration controller and routing interface . . . . . . . . . . . . . . . 23 3.16 Touch sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.17 AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Shared peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Common system strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Doc ID 022268 Rev 2 ...

Page 3

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.18 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.18.1 3.18.2 3.18.3 3.18.4 3.18.5 3.19 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.19.1 3.19.2 3.19.3 3.19.4 3.19.5 3.19.6 3.20 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 27 3.21 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.1.6 6.1.7 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.3.1 6.3.2 6.3.3 6.3.4 6.3.5 General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM9, TIM10 and TIM11) ...

Page 4

... Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 7.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 7.2.1 8 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 4/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Absolute maximum ratings (electrical sensitivity I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 NRST pin characteristics ...

Page 5

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD List of tables Table 1. Ultralow power STM32L162xD device features and peripheral counts . . . . . . . . . . . . . . . 10 Table 2. Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 3. STM32L162QD BGA132 ballout Table 4. STM32L162RD WLCSP64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5. STM32L162xD pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6. Alternate function input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 7. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 8. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 9 ...

Page 6

... UFBGA132 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Table 72. WLCSP64, 0.400 mm pitch wafer level chip size package mechanical data . . . . . . . . . . 120 Table 73. Thermal characteristics 121 Table 74. STM32L162xD ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 6/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD = 32 MHz 3 PCLK1 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Doc ID 022268 Rev 2 ...

Page 7

... List of figures Figure 1. Ultralow power STM32L162xD block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 3. STM32L162ZD LQFP144 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 4. STM32L162VD LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 5. STM32L162RD LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 6. Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 7. Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 8. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 9. Power supply scheme Figure 10. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 11 ...

Page 8

... For information on the Cortex™-M3 core please refer to the Cortex™-M3 Technical Reference Manual, available from the www.arm.com website at the following address: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337g. Figure 1 shows the general block diagram of the device family. 8/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Doc ID 022268 Rev 2 ...

Page 9

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 2 Description The high density ultralow power STM32L162xD incorporates the connectivity power of the universal serial bus (USB) with the high-performance ARM Cortex operating MHz frequency, a memory protection unit (MPU), high-speed embedded memories (Flash memory up to 384 Kbytes and RAM Kbytes), a flexible static memory controller (FSMC) interface (for devices with packages of 100 pins and more) and an extensive range of enhanced I/Os and peripherals connected to two APB buses ...

Page 10

... ADC Number of channels 12-bit DAC Number of channels LCD COM x SEG Comparators Capacitive sensing No. of channels/No. of groups CPU frequency Operating voltage Operating temperatures Packages 1. 109 GPIOs in BGA132 package. 10/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD STM32L162RD 384 bit 1 General-purpose 6 Basic 2 SPI/(I2S) 3/(2) ...

Page 11

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 2.2 Ultralow power device continuum The ultralow power STM32L15xxD, STM32L162xD, and STM32L15xxC are fully pin-to-pin, software and feature compatible. Besides the full compatibility within the family, the devices are part of STMicroelectronics microcontrollers ultralow power strategy which also includes STM8L101xx and STM8L15xx devices ...

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... Functional overview 3 Functional overview Figure 1. Ultralow power STM32L162xD block diagram 12/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Doc ID 022268 Rev 2 ...

Page 13

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 1. Legend: AF: alternate function ADC: analog-to-digital converter AES: advanced encryption standard hardware accelerator BOR: brown out reset DMA: direct memory access DAC: digital-to-analog converter I²C: inter-integrated circuit multimaster interface 3.1 Low power modes The ultralow power STM32L162xD supports dynamic voltage scaling to optimize its power consumption in run mode. The voltage from the internal low-drop regulator that supplies the logic can be adjusted according to the system’ ...

Page 14

... It provides up to eight different regions and an optional predefined background region. Owing to its embedded ARM core, the STM32L162xD is compatible with all ARM tools and software. 14/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD domain is powered off. The PLL, MSI CORE Doc ID 022268 Rev 2 domain is ...

Page 15

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Nested vectored interrupt controller (NVIC) The ultralow power STM32L162xD embeds a nested vectored interrupt controller able to handle maskable interrupt channels (not including the 16 interrupt lines of Cortex™-M3) and 16 priority levels. ● Closely coupled NVIC gives low-latency interrupt processing ● ...

Page 16

... This dual boot capability can be used to easily implement a secure field software update mechanism. The boot loader is located in System memory used to reprogram the Flash memory by using USART1, USART2 or USB. 16/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD ) in Stop mode. The device remains in reset mode when REFINT without the need for any external ...

Page 17

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.4 Clock management The clock controller distributes the clocks coming from different oscillators to the core and the peripherals. It also manages clock gating for low power modes and ensures clock robustness. It features: ● Clock prescaler: to get the best trade-off between speed and current consumption, ...

Page 18

... Functional overview Figure 2. Clock tree 1. For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at either 24 MHz or 32 MHz. 18/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Doc ID 022268 Rev 2 ...

Page 19

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.5 Low power real-time clock and backup registers The real-time clock (RTC independent BCD timer/counter. Dedicated registers contain the sub-second, second, minute, hour (12/24 hour), week day, date, month, year, in BCD (binary-coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are made automatically ...

Page 20

... Configuration is done by software and transfer sizes between source and destination are independent. The DMA can be used with the main peripherals: AES, SPI, I purpose timers, DAC, and ADC. 20/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Doc ID 022268 Rev USART, SDIO, general- ...

Page 21

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.10 LCD (liquid crystal display) The LCD drives common terminals and 44 segment terminals to drive up to 320 pixels. ● Internal step-up converter to guarantee functionality and contrast control irrespective This converter can be deactivated, in which case the V DD the voltage to the LCD ● ...

Page 22

... Both comparators can wake up from Stop mode, and be combined into a window comparator. The internal reference voltage is available externally via a low power / low current output buffer (driving current capability of 1 µA typical). 22/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD REF submultiple (1/4, 1/2, 3/4) REFINT Doc ID 022268 Rev 2 ...

Page 23

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.15 System configuration controller and routing interface The system configuration controller provides the capability to remap some alternate functions on different I/O ports. The highly flexible routing interface allows the application firmware to control the routing of different I/Os to the TIM2, TIM3 and TIM4 timer input captures. It also controls the routing of ...

Page 24

... PWM outputs. TIM2, TIM3, TIM4, TIM5 all have independent DMA request generation. These timers are capable of handling quadrature (incremental) encoder signals and the digital outputs from hall-effect sensors. 24/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD DMA request Prescaler factor generation Any integer between ...

Page 25

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD TIM10, TIM11 and TIM9 TIM10 and TIM11 are based on a 16-bit auto-reload upcounter. TIM9 is based on a 16-bit auto-reload up/down counter. They include a 16-bit prescaler. TIM10 and TIM11 feature one independent channel, whereas TIM9 has two independent channels for input capture/output compare, PWM or one-pulse mode output ...

Page 26

... Mbit/s. The USB interface implements a full-speed (12 Mbit/s) function interface. It has software-configurable endpoint setting and supports suspend/resume. The dedicated 48 MHz clock is generated from the internal main PLL (the clock source must use a HSE crystal oscillator). 26/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 2 S) Doc ID 022268 Rev 2 ...

Page 27

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3.20 CRC (cyclic redundancy check) calculation unit The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit data word and a fixed generator polynomial. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity ...

Page 28

... PC2 SSA OPAMP K 3_ PC3 PA2 VINM PA0 PA3 REF+ WKUP1 OPAM M V PA1 P1_ DDA VINM 28/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD BOOT0 PD7 PD5 PB4 PB7 PB6 PD6 PD4 V PB5 PG14 PG13 DD_3 PF2 PF1 PF0 PG12 ...

Page 29

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 3. STM32L162ZD LQFP144 pinout Doc ID 022268 Rev 2 Pin descriptions 29/124 ...

Page 30

... PC14-OSC32_IN PC15-OSC32_OUT VSS_5 VDD_5 PH0-OSC_IN PH1-OSC_OUT NRST PC0 PC1 PC2 PC3 VSSA VREF- VREF+ VDDA PA0-WKUP1 PA1 PA2 Figure 5. STM32L162RD LQFP64 pinout PC14-OSC32_IN PC15-OSC32_OUT 30/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD LQFP100 ...

Page 31

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 4. STM32L162RD WLCSP64 ballout DD_3 PC14- B OSC32_IN PC13- C WKUP2 PH0- D OSC_IN E PC0 F PC1 G V DDA H PA2 BOOT0 PB5 SS_3 PC15- PB9 PB6 OSC32_OUT NRST V PB7 LCD PH1- PC2 PB8 OSC_OUT V PA1 PA5 SSA PA0- ...

Page 32

... D7 OSC_OUT NRST PC0 PC1 PC2 - PC2 - OPAMP3_VINM 32/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Main (3) function (after reset) I/O FT PE2 I/O FT PE3 TIM3_CH1/LCD_SEG39/ FSMC_A19/TRACED0 I/O FT PE4 I/O FT PE5 I/O FT PE6 WKUP3/TAMPER3/TIM9_CH2/TRACED3 S V LCD I/O FT PC13 I/O PC14 (4) I/O PC15 I/O FT PF0 I/O FT PF1 I/O FT PF2 ...

Page 33

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 5. STM32L162xD pin definitions (continued) Pins Pin name PC3 SSA REF REF DDA PA0-WKUP1 PA1 PA2 - PA2 - OPAMP1_VINM ...

Page 34

... F12 SS_1 72 G12 DD_1 73 L12 PB12 74 K12 PB13 75 K11 PB14 76 K10 PB15 PD8 34/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Main (3) function (after reset) I/O FT PB2/BOOT1 I/O FT PF11 I/O FT PF12 ADC_IN2b/COMP1_INP/FSMC_A6 S V SS_6 S V DD_6 I/O FT PF13 ADC_IN3b/COMP1_INP/FSMC_A7 ...

Page 35

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 5. STM32L162xD pin definitions (continued) Pins Pin name PD9 79 J12 PD10 80 J11 PD11 81 J10 PD12 82 H12 PD13 SS_8 DD_8 85 H11 PD14 86 H10 PD15 87 G10 - - - PG2 PG3 89 F10 - - - PG4 PG5 PG6 ...

Page 36

... PG15 133 PB3 134 PB4 135 PB5 136 PB6 137 PB7 36/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Main (3) function (after reset) SPI3_SCK/I2S3_CK/USART3_TX/ UART4_TX/ I/O FT PC10 LCD_SEG28/LCD_SEG40/LCD_COM4/ SPI3_MISO/USART3_RX/UART4_RX/ I/O FT PC11 LCD_SEG29/LCD_SEG41/LCD_COM5/ SPI3_MOSI/I2S3_SD/USART3_CK/ UART5_TX/ I/O FT PC12 LCD_SEG30/LCD_SEG42/LCD_COM6/ ...

Page 37

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 5. STM32L162xD pin definitions (continued) Pins Pin name 138 BOOT0 139 PB8 140 PB9 141 PE0 142 PE1 143 SS_3 144 C4 100 DD_3 input output supply. ...

Page 38

Table 6. Alternate function input/output AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 BOOT0 BOOT0 NRST NRST WKUP1/ PA0- TAMPER2 TIM2_CH1_ ETR TIM5_CH1 WKUP1 PA1 TIM2_CH2 TIM5_CH2 PA2 TIM2_CH3 TIM5_CH3 TIM9_CH1 PA3 TIM2_CH4 TIM5_CH4 TIM9_CH2 PA4 PA5 ...

Page 39

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PA11 PA12 PA13 JTMS-SWDIO PA14 JTCK-SWCLK PA15 JTDI TIM2_CH1_ETR PB0 TIM3_CH3 PB1 TIM3_CH4 PB2 BOOT1 PB3 JTDO TIM2_CH2 PB4 JTRST TIM3_CH1 PB5 TIM3_CH2 ...

Page 40

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PB10 TIM2_CH3 PB11 TIM2_CH4 TIM10_ PB12 CH1 TIM9_ PB13 CH1 TIM9_ PB14 CH2 TIM11_ PB15 RTC 50/60 Hz CH1 PC0 PC1 PC2 PC3 ...

Page 41

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PC7 TIM3_CH2 PC8 TIM3_CH3 PC9 TIM3_CH4 PC10 PC11 PC12 WKUP2/ TAMPER1/ PC13- TIMESTAMP/ WKUP2 ALARM_OUT/ 512Hz PC14 OSC32_I OSC32_IN N PC15 OSC32_ OSC32_OUT ...

Page 42

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PD3 PD4 PD5 PD6 PD7 TIM9_CH2 PD8 PD9 PD10 PD11 PD12 TIM4_CH1 PD13 TIM4_CH2 PD14 TIM4_CH3 PD15 TIM4_CH4 TIM10_ PE0 TIM4_ETR CH1 TIM11_ ...

Page 43

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PE2 TRACECK TIM3_ETR PE3 TRACED0 TIM3_CH1 PE4 TRACED1 TIM3_CH2 PE5 TRACED2 TIM9_CH1 WKUP3/ PE6- TAMPER3 / TIM9_CH2 WKUP3 TRACED3 PE7 PE8 PE9 TIM2_CH1_ETR ...

Page 44

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PF1 PF2 PF3 PF4 PF5 TIM5_CH1 PF6 _ETR PF7 TIM5_CH2 PF8 TIM5_CH3 PF9 TIM5_CH4 PF10 PF11 PF12 PF13 PF14 PF15 Digital alternate function ...

Page 45

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 Digital alternate function number AFIO4 AFIO5 AFIO6 AFIO7 ...

Page 46

Table 6. Alternate function input/output (continued) AFIO0 AFIO1 AFIO2 AFIO3 Port name TIM9/ SYSTEM TIM2 TIM3/4/5 10/11 PG15 PH0OSC _ OSC_IN IN PH1OSC OSC_OUT _OUT PH2 Digital alternate function number AFIO4 AFIO5 AFIO6 AFIO7 AFIO8 .. AFIO10 AFIO11 AFIO12 .. ...

Page 47

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 5 Memory mapping Figure 6. Memory map 0xFFFF FFFF 7 0xE010 0000 Cortex- M3 internal 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x7000 0000 external memory 0x6000 0000 2 0x4000 0000 1 0x2000 0000 0 0x0000 0000 pe ripherals FSMC registers 0x1FF8 009F 0x1FF8 0080 ...

Page 48

... Loading capacitor The loading conditions used for pin parameter measurement are shown in 6.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 7. Pin loading conditions 48/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD A Figure 8. Doc ID 022268 Rev °C and max (given by ...

Page 49

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.1.6 Power supply scheme Figure 9. Power supply scheme N × 100 × 4.7 µ µ µF Caution: In this figure, the 4.7 µF capacitor must be connected to V 6.1.7 Current consumption measurement Figure 10. Current consumption measurement scheme OUT GP I/ DD1/2/.../N Regulator V SS1/2/ ...

Page 50

... Refer positive injection is induced by V must never be exceeded. Refer to values. 5. When several inputs are submitted to a current injection, the maximum ΣI positive and negative injected currents (instantaneous values). 50/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 9: Thermal characteristics Ratings (1) and V ) DDA ...

Page 51

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 9. Thermal characteristics Symbol T STG T J 6.3 Operating conditions 6.3.1 General operating conditions Table 10. General operating conditions Symbol f Internal AHB clock frequency HCLK f Internal APB1 clock frequency PCLK1 f Internal APB2 clock frequency PCLK2 V Standard operating voltage DD Analog operating voltage ...

Page 52

... Symbol Parameter V rise time rate DD (1) t VDD V fall time rate DD (1) T Reset temporization RSTTEMPO 52/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Functionalities depending on the operating power supply range USB V CORE Not Range 2 or functional range 3 Not Range 2 or functional range 3 Ksps Range 1, range (1) ...

Page 53

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 12. Embedded reset and power control block characteristics (continued) Symbol Parameter Power on/power down reset V POR/PDR threshold V Brown-out reset threshold 0 BOR0 V Brown-out reset threshold 1 BOR1 V Brown-out reset threshold 2 BOR2 V Brown-out reset threshold 3 BOR3 V Brown-out reset threshold 4 BOR4 ...

Page 54

... EEPROM bytes. REF 3. Guaranteed by design, not tested in production. 4. Shortest sampling time can be determined in the application by multiple iterations guarantee less than 1% VREF_OUT deviation. 54/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 13 are based on characterization results, unless otherwise Conditions – 40 °C < T < +105 °C ...

Page 55

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.4 Supply current characteristics The current consumption is a function of several parameters and factors such as the operating voltage, ambient temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code. The current consumption is measured as described in ...

Page 56

... MHz) MSI clock, 65 kHz MSI clock, 524 kHz MSI clock, 4.2 MHz 1. Based on characterization, not tested in production, unless otherwise specified. 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register). 3. Tested in production. 56/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Conditions 1 MHz Range MHz CORE VOS[1: ...

Page 57

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 16. Current consumption in Sleep mode Symbol Parameter HSE HCLK MHz, included HSE HCLK Supply above 16 MHz current in (PLL ON) Sleep mode, code executed from RAM, Flash switched HSI clock source OFF (16 MHz) MSI clock, 65 kHz ...

Page 58

... V to 3.6 V Max allowed V from DD I max current (LP Run) Low power 3.6 V run mode 1. Based on characterization, not tested in production, unless otherwise specified. 58/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Conditions T A MSI clock, 65 kHz kHz HCLK MSI clock, 65 kHz T A ...

Page 59

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 18. Current consumption in Low power sleep mode Symbol Parameter Supply current Low power (LP Sleep) sleep mode Max allowed I max current in DD (LP Sleep) Low power Sleep mode 1. Based on characterization, not tested in production, unless otherwise specified. Conditions MSI clock, 65 kHz ...

Page 60

... Stop mode with with RTC enabled RTC) Supply current Stop mode ( (Stop) RTC disabled) 60/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Conditions LCD OFF RTC clocked by LSI, regulator in LP mode, LCD ON HSI and HSE OFF (static (2) (no independent duty) watchdog) LCD ON ...

Page 61

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 19. Typical and maximum current consumptions in Stop mode (continued) Symbol Parameter I DD Supply current (WU during wakeup from from Stop mode Stop) 1. Based on characterization, not tested in production, unless otherwise specified 2. LCD enabled with external VLCD, static duty, division ratio = 256, all pixels active, no LCD connected 3 ...

Page 62

... Typical and maximum timings in Low power modes Symbol t WUSLEEP t WUSLEEP_LP t WUSTOP t WUSTDBY 1. Based on characterization, not tested in production, unless otherwise specified 62/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 10. Parameter Wakeup from Sleep mode f HCLK f HCLK Wakeup from Low power Flash enabled sleep mode ...

Page 63

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in the following table. The MCU is placed under the following conditions: ● all I/O pins are in input mode with a static value at V ● all peripherals are disabled unless otherwise mentioned ● ...

Page 64

... HCLK each peripheral. The CPU is in Sleep mode in both cases. No I/O pins toggling. Not tested in production. 2. HSI oscillator is OFF for this measure. 64/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD (1) Typical consumption, V Range 1, Range ...

Page 65

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 3. Data based on a differential I conversion (HSI consumption not included). 4. Data based on a differential I conversion Including supply current of internal reference voltage. 6.3.5 External clock source characteristics High-speed external user clock generated from an external source Table 23. High-speed external user clock characteristics ...

Page 66

... OSC32_IN input capacitance IN(LSE) DuCy Duty cycle (LSE) I OSC32_IN Input leakage current L 1. Guaranteed by design, not tested in production Figure 11. Low-speed external clock source AC timing diagram 66/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 10. Parameter Conditions ≤ Doc ID 022268 Rev 2 (1) Min Typ ...

Page 67

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 12. High-speed external clock source AC timing diagram High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization ...

Page 68

... C and C . Refer to the application note AN2867 “Oscillator design guide for microcontrollers” available from the ST website www.st.com. 68/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Conditions = 30 Ω (3) ) ...

Page 69

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 13. HSE oscillator circuit diagram 1. R value depends on the crystal characteristics. EXT Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization ...

Page 70

... Example: if you choose a resonator with a load capacitance of C then pF Figure 14. Typical application with a 32.768 kHz crystal 70/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD L1 has the following formula and C L1 ≤ 7 pF. Never use a resonator with a load L Doc ID 022268 Rev 2 ...

Page 71

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.6 Internal clock source characteristics The parameters given in temperature and V High-speed internal (HSI) RC oscillator Table 27. HSI oscillator characteristics Symbol Parameter f Frequency HSI HSI user-trimmed (1)(2) TRIM resolution Accuracy of the (2) ACC factory-calibrated HSI HSI oscillator HSI oscillator (2) t SU(HSI) startup time ...

Page 72

... MSI oscillator frequency drift (1) D TEMP(MSI) 0 °C ≤ T MSI oscillator frequency drift (1) D VOLT(MSI) 1.65 V ≤ V (2) I MSI oscillator power consumption DD(MSI) 72/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter = 3.3 V and °C A ≤ 85 °C A ≤ 3 ° Doc ID 022268 Rev 2 Condition Typ Max ...

Page 73

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 29. MSI oscillator characteristics (continued) Symbol t MSI oscillator startup time SU(MSI) (2) t MSI oscillator stabilization time STAB(MSI) f MSI oscillator frequency overshoot OVER(MSI) 1. This is a deviation for an individual part, once the initial frequency has been measured. 2. Based on characterization, not tested in production. ...

Page 74

... VRM Data retention mode 1. Minimum supply voltage without losing data stored in RAM (in Stop mode or under Reset hardware registers (only in Stop mode). 74/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 30 are derived from tests performed under ambient supply voltage conditions summarized in DD Parameter ...

Page 75

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Flash memory Table 32. Flash memory characteristics Symbol Parameter Operating voltage V DD Read / Write / Erase Programming time for t prog word or half-page Average current during the whole programming / erase operation I DD Maximum current (peak) during the whole pro- gramming / erase opera- tion 1 ...

Page 76

... The results shown in these tables are obtained with the following FSMC configuration: ● AddressSetupTime = 0 ● AddressHoldTime = 1 ● DataSetupTime = 1 Figure 15. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms 1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used. 76/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 18 represent asynchronous waveforms and Doc ID 022268 Rev 2 Table 34 through ...

Page 77

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 34. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings Symbol t FSMC_NE low time w(NE) t FSMC_NEx low to FSMC_NOE low v(NOE_NE) t FSMC_NOE low time w(NOE) t FSMC_NOE high to FSMC_NE high hold time h(NE_NOE) t FSMC_NEx low to FSMC_A valid v(A_NE) t Address hold time after FSMC_NOE high ...

Page 78

... FSMC_NEx low to FSMC_NADV low v(NADV_NE) t FSMC_NADV low time w(NADV pF Preliminary values. Figure 17. Asynchronous multiplexed PSRAM/NOR read waveforms FSMC_NE FSMC_NOE FSMC_NWE FSMC_A[25:16] FSMC_NBL[1:0] FSMC_ AD[15:0] FSMC_NADV 78/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter t w(NE) t v(NOE_NE) t v(A_NE) Address t v(BL_NE) NBL t v(A_NE) Address t t v(NADV_NE) ...

Page 79

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 36. Asynchronous multiplexed PSRAM/NOR read timings Symbol t FSMC_NE low time w(NE) t FSMC_NEx low to FSMC_NOE low v(NOE_NE) t FSMC_NOE low time w(NOE) t FSMC_NOE high to FSMC_NE high hold time h(NE_NOE) t FSMC_NEx low to FSMC_A valid v(A_NE) t FSMC_NEx low to FSMC_NADV low v(NADV_NE) t FSMC_NADV low time ...

Page 80

... FSMC_BL hold time after FSMC_NWE high h(BL_NWE) t FSMC_NADV high to Data valid v(Data_NADV) t Data hold time after FSMC_NWE high h(Data_NWE pF Preliminary values. 80/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Doc ID 022268 Rev 2 (1)(2) Min Max Unit TBD TBD ns 2T TBD ns HCLK ...

Page 81

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Synchronous waveforms and timings Figure 19 through Table 41 provide the corresponding timings. The results shown in these tables are obtained with the following FSMC configuration: ● BurstAccessMode = FSMC_BurstAccessMode_Enable; ● MemoryType = FSMC_MemoryType_CRAM; ● WriteBurst = FSMC_WriteBurst_Enable; ● CLKDivision = not supported, see the STM32F10xxx reference manual) ● ...

Page 82

... FSMC_A/D[15:0] valid data after FSMC_CLK high h(CLKH-ADV) t FSMC_NWAIT valid before FSMC_CLK high su(NWAITV-CLKH) t FSMC_NWAIT valid after FSMC_CLK high h(CLKH-NWAITV pF Preliminary values. 82/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Doc ID 022268 Rev 2 (1)(2) Min Max Unit 2*T ns HCLK TBD ns TBD ns TBD ...

Page 83

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 20. Synchronous multiplexed PSRAM write timings Doc ID 022268 Rev 2 Electrical characteristics 83/124 ...

Page 84

... pF Preliminary values 84/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter FSMC_CLK period FSMC_CLK low to FSMC_Nex low (x = 0...2) FSMC_CLK low to FSMC_NEx high (x = 0...2) FSMC_CLK low to FSMC_NADV low FSMC_CLK low to FSMC_NADV high FSMC_CLK low to FSMC_Ax valid (x = 16...25) FSMC_CLK low to FSMC_Ax invalid (x = 16...25) ...

Page 85

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 21. Synchronous non-multiplexed NOR/PSRAM read timings Table 40. Synchronous non-multiplexed NOR/PSRAM read timings Symbol t FSMC_CLK period w(CLK) t FSMC_CLK low to FSMC_NEx low (x = 0...2) d(CLKL-NExL) t FSMC_CLK low to FSMC_NEx high (x = 0...2) d(CLKL-NExH) t FSMC_CLK low to FSMC_NADV low d(CLKL-NADVL) t FSMC_CLK low to FSMC_NADV high ...

Page 86

... pF Preliminary values. 86/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter FSMC_CLK period FSMC_CLK low to FSMC_NEx low (x = 0...2) FSMC_CLK low to FSMC_NEx high (x = 0...2) FSMC_CLK low to FSMC_NADV low FSMC_CLK low to FSMC_NADV high FSMC_CLK low to FSMC_Ax valid (x = 16...25) FSMC_CLK low to FSMC_Ax invalid (x = 16...25) ...

Page 87

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.10 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: ● ...

Page 88

... ESD absolute maximum ratings Symbol Electrostatic discharge V ESD(HBM) voltage (human body model) Electrostatic discharge V ESD(CDM) voltage (charge device model) 1. Based on characterization results, not tested in production. 88/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Monitored Conditions frequency band 0 MHz = 3 ° 130 MHz A ...

Page 89

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: ● A supply overvoltage is applied to each power supply pin ● A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. ...

Page 90

... Five-volt tolerant. 6. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production. 7. With a minimum of 200 mV. Based on characterization, not tested in production. 90/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Table 47 Table 10. All I/Os are CMOS and TTL Conditions TTL ports ≤ ...

Page 91

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 8. The max. value may be exceeded if negative current is injected on adjacent pins. 9. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order) Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ± ...

Page 92

... The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the STM32L151xx, STM32L152xx and STM32L162xx reference manual for a description of GPIO Port configuration register. 2. Guaranteed by design. Not tested in production. 3. The maximum frequency is defined in 92/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD supply voltage conditions summarized in DD (1) Parameter ...

Page 93

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 23. I/O AC characteristics definition External Output on 50pF Maximum frequency is achieved if (t 6.3.14 NRST pin characteristics The NRST pin input driver uses CMOS technology. Unless otherwise specified, the parameters given in performed under ambient temperature and V Table 10. Table 50. NRST pin characteristics ...

Page 94

... COUNTER selected (timer’s prescaler disabled) t Maximum possible count MAX_COUNT 1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers. 94/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD (1) characteristics Parameter Conditions f TIMxCLK MHz TIMxCLK f ...

Page 95

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.16 Communications interfaces interface characteristics Unless otherwise specified, the parameters given in performed under ambient temperature, f summarized in Table The STM32L162xD product line I communication protocol with the following restrictions: SDA and SCL are not “true” open- drain I/O pins. When configured as open-drain, the PMOS connected between the I/O pin and V is disabled, but is still present ...

Page 96

... For speeds around 200 kHz, the tolerance on the achieved speed is of ±5%. For other speed ranges, the tolerance on the achieved speed is ±2%. These variations depend on the accuracy of the external components used to design the application. 96/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD and 0. MHz, V ...

Page 97

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD SPI characteristics Unless otherwise specified, the parameters given in the following table are derived from tests performed under ambient temperature, f conditions summarized in Refer to Section 6.3.12: I/O current injection characteristics input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 54. SPI characteristics ...

Page 98

... SU(NSS) CPHA=1 CPOL=0 t w(SCKH) CPHA=1 t w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT 1. Measurement points are done at CMOS levels: 0.3V 98/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD t c(SCK) t v(SO) t h(SO OUT h(SI) t c(SCK) t v(SO OUT t h(SI and 0 ...

Page 99

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 28. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTPUT 1. Measurement points are done at CMOS levels: 0.3V USB characteristics The USB interface is USB-IF certified (full speed). Table 55. ...

Page 100

... V Output signal crossover voltage CRS 1. Guaranteed by design, not tested in production. 2. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB Specification - Chapter 7 (version 2.0). 100/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Conditions I(USBDP, USBDM 1.5 kΩ kΩ ...

Page 101

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 58. ADC clock frequency Symbol Parameter ADC clock f ADC frequency Table 59. ADC characteristics Symbol V Power supply DDA V Positive reference voltage REF+ V Negative reference voltage REF- Current on the V I VDDA ...

Page 102

... Refer must be tied to ground. SSA REF- 5. Minimum sampling and conversion time is reached for maximum Rext = 0.5 kΩ. 6. For 1 Msps, maximum Rext is 0.5 k 102/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Conditions Direct channels 2.4 V ≤ V DDA Multiplexed channels 2.4 V ≤ V DDA Direct channels 1.8 V ≤ ...

Page 103

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD (1)(2) Table 60. ADC accuracy Symbol Parameter ET Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error ENOB Effective number of bits Signal-to-noise and SINAD distorsion ratio SNR Signal-to-noise ratio THD Total harmonic distorsion ET Total unadjusted error ...

Page 104

... Figure 31. Typical connection diagram using the ADC 1. Refer to Table represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the parasitic pad capacitance (roughly 7 pF). A high C this, f should be reduced. ADC 104/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD V V REF+ DDA = (or depending on package)] 4096 4096 (2) ...

Page 105

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 32. Maximum dynamic current consumption on V conversion Sampling (n cycles) ADC clock I ref+ 700µA 300µA Table 61. R max for f AIN ADC Ts Ts (cycles) (µs) 2.4 V < V DDA 4 0.25 Not allowed 9 0.5625 0 2.0 24 1 15.0 192 12 32.0 384 24 50.0 1. Guaranteed by design, not tested in production. ...

Page 106

... V and V REF+ REF– Figure 34. Power supply and reference decoupling ( and V REF+ REF– 106/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD inputs are available only on 100-pin packages. inputs are available only on 100-pin packages. Doc ID 022268 Rev 2 V not connected to ) REF+ DDA V ...

Page 107

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.18 DAC electrical specifications Data guaranteed by design, not tested in production, unless otherwise specified. Table 62. DAC characteristics Symbol Parameter V Analog supply voltage DDA V Reference supply voltage REF+ V Lower reference voltage REF- Current consumption on ( supply DDVREF+ REF 3.3 V REF+ ...

Page 108

... Data based on characterization results. Connected between DAC_OUT and Difference between two consecutive codes - 1 LSB. 4. Difference between measured value at Code i and the value at Code line drawn between Code 0 and last Code 4095. 108/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Conditions = 3.3V V DDA = 3.0V V REF ° ...

Page 109

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 5. Difference between the value measured at Code (0x800) and the ideal value = V 6. Difference between the value measured at Code (0x001) and the ideal value. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 7 ...

Page 110

... Wakeup time WAKEUP 1. Operating conditions are limited to junction temperature (0 °C to 105 °C) when V temperature range is 105 °C to -40 °C. 2. Data based on characterization results, not tested in production. 110/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Condition Normal mode V >2 Low power mode Normal mode V < ...

Page 111

... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.20 Temperature sensor characteristics Table 64. TS characteristics Symbol ( SENSE (1) Avg_Slope Average slope V Voltage at 110°C ±5°C 110 (3) I Current consumption DDA (TEMP) (3) t Startup time START ADC sampling time when reading the (4)(3) T S_temp temperature 1. Guaranteed by characterization, not tested in production. ...

Page 112

... The delay is characterized for 100 mV input step with 10 mV overdrive on the inverting input, the non- inverting input set to the reference. 3. Comparator consumption only. Internal reference voltage (necessary for comparator operation) is not included. 112/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Parameter Conditions Fast mode Slow mode 1.65 V ≤ ...

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... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 6.3.22 LCD controller The STM32L162xD embeds a built-in step-up converter to provide a constant LCD reference voltage independently from the V connected to the V Table 67. LCD controller characteristics Symbol V LCD external voltage LCD V LCD internal reference voltage 0 LCD0 V LCD internal reference voltage 1 LCD1 ...

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... In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. 114/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Doc ID 022268 Rev 2 ® ...

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... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 36. LQFP144 mm, 144-pin low-profile quad flat package outline Seating plane ccc 108 109 144 Pin 1 1 identification 1. Drawing is not to scale. Dimensions are in millimeters. Table 68. LQFP144 mm, 144-pin low-profile quad flat package mechanical data ...

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... Symbol Min A A1 0.05 A2 1.35 b 0.17 c 0.09 D 15 15 0.0° ccc 1. Values in inches are converted from mm and rounded to 4 decimal digits. 116/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 0.25 mm 0.10 inch GAGE PLANE SEATING PLANE C 1L_ME millimeters Typ Max 1.6 0.15 1.4 1.45 0.22 0.27 0.2 16 16.2 14 14.2 ...

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... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 40. LQFP64 mm, 64-pin low-profile quad flat package outline Drawing is not to scale. Dimensions are in millimeters. Table 70. LQFP64 mm, 64-pin low-profile quad flat package mechanical data Symbol Min A A1 0.05 A2 1.35 b 0. θ ...

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... Dimension is measured at the maximum solder ball diameter, parallel to primary datum C. Table 71. UFBGA132 package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. 118/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD A1 Ball Pad Corner Detail Detail A Seating plane rotated 90° millimeters ...

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... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Figure 43. WLCSP64, 0.400 mm pitch wafer level chip size package outline Doc ID 022268 Rev 2 Package characteristics 119/124 ...

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... A1 0.170 A2 0.350 b 0.240 D 4.519 E 4.891 eee 1. Values in inches are converted from mm and rounded to 4 decimal digits. 120/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD millimeters Min Typ Max 0.570 0.620 0.190 0.210 0.380 0.410 0.270 0.300 4.539 4.559 4.911 4.931 0.400 2 ...

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... STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD 7.2 Thermal characteristics The maximum chip-junction temperature, T using the following equation: Where: max is the maximum ambient temperature in ° C, ● Θ is the package junction-to-ambient thermal resistance, in ° C/W, ● JA ● P max is the sum ● P max is the product of I INT internal power ...

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... TR = tape and reel No character = tray or tube For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 122/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD STM32 range: 1.8 to 3.6 V and BOR enabled Doc ID 022268 Rev 2 L 162 V D ...

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... Revision 1 Initial release. Status of the document changed (datasheet instead of preliminary data). Added STM32L162RD part number. Added LQFP64 and WLCSP64 packages. Updated “Low power ” and “Memory” feature on page 1. Introduction and Description: added ‘high density’. GPIOF replaced with GIOPH. ...

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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 124/124 STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RD Please Read Carefully: © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies www ...

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