STM8S103F2 STMicroelectronics, STM8S103F2 Datasheet - Page 111

• Manufacturer Part Number: STM8S103F2
• Description: Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S103F2

• Program Memory: 8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
• Data Memory: 640 bytes true data EEPROM; endurance 300 kcycles
• Ram: 1 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

STM8S103K3 STM8S103F3 STM8S103F2
Date
09-Sep-2010
12-Jul-2011
Revision
6
7
Changes
Updated maximum power dissipation in
operating
Updated Θ
Replaced package pitch digit by VFQFPN/UFQFPN package
digit in
scheme, and removed note 1.
Removed VFQFPN32 package.
Removed internal reference voltage from
converter
Updated "reset state" of
pinout tables
Added footnote to PD1/SWIM pin in
UFQFPN32/LQFP32 pinout and pin
Updated pins 14 and 19 (TSSOP20/SO20) / pins 11 and 16
(UFQFPN20) in
pin
General hardware register map
values; updated the reset state values of the RST_SR,
CLK_SWCR, CLK_HSITRIMR, CLK_SWIMCCR, IWDG_KR,
and ADC_DRx registers in the "General hardware register
map" table.
Updated AFR2 description of OPT 2 in
alternate function remapping bits for 20-pin
Replaced 0.01 µF with 0.1 µf in
reset pin
Added "Typical application with I
I2C interface
Updated footnote 1 in
10 kΩ , VDD= 5 V
10 kΩ RAIN, VDD = 3.3 V
STM8S103 FASTROM microcontroller option
"special marking" section and AFR2 description of
alternate function remapping for
32-lead UFQFPN package mechanical
footnote and added three additional footnotes.
Updated note related to true open-drain outputs in
STM8S103Fx pin
Remove CLK_CANCCR register from
hardware register map
DocID15441 Rev 7
description.
Figure 51: STM8S103x access line ordering information
protection.
conditions.
(ADC1).
JA
characteristics.
in
in
Table 57: Thermal
STM8S103Fx TSSOP20/SO20/UFQFPN20
Pinout and pin
description.
and
Table 46: ADC accuracy with RAIN <
Table 47: ADC accuracy with RAIN <
Table 4: Legend/abbreviations for
.
description.
Figure 37: Recommended
: Standardized all reset state
2
STM8S103F.
C bus and timing diagram in
characteristics.
STM8S103Kx
description.
Table 8: General
Table 14: STM8S103F
data: updated existing
Table 19: General
Analog-to-digital
devices.
Revision history
list: updated
OPT2
Table 6:
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