STM8AF52AA STMicroelectronics, STM8AF52AA Datasheet - Page 13

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STM8AF52AA

Manufacturer Part Number
STM8AF52AA
Description
STM8AF52 CAN Line
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF52AA

Max Fcpu
24 MHz
Program Memory
32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memory
up to 2 Kbytes true data EEPROM; endurance 300 kcycles
Ram
2 Kbytes to 6 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
STM8AF52/62xx, STM8AF51/61xx
4
Block diagram
Figure 1.
STM8A block diagram
Reset
Single wire
debug interf.
Master/slave
automatic
resynchronization
400 Kbit/s
10 Mbit/s
LIN master
SPI emul.
1 Mbit/s
Up to
16 channels
Reset block
Clock controller
Reset
Detector
POR
PDR
Clock to peripherals and core
STM8A CORE
Debug/SWIM
LINUART
2
I
C
SPI
USART
beCAN
10-bit ADC
Doc ID 14395 Rev 8
Block diagram
XTAL 1-24 MHz
RC int. 16 MHz
RC int. 128 kHz
Window WDG
WDG
Up to 128 Kbyte
high density program
Flash
Up to 2 Kbytes
data EEPROM
Up to 6 Kbytes
RAM
Boot ROM
16-bit advanced control
timer (TIM1)
Up to
9 CAPCOM
channels
16-bit general purpose
(TIM2, TIM3)
8-bit AR timer
(TIM4)
AWU timer
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