STM8AF52AA

Manufacturer Part NumberSTM8AF52AA
DescriptionSTM8AF52 CAN Line
ManufacturerSTMicroelectronics
STM8AF52AA datasheet
 


Specifications of STM8AF52AA

Max Fcpu24 MHzProgram Memory32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memoryup to 2 Kbytes true data EEPROM; endurance 300 kcyclesRam2 Kbytes to 6 Kbytes
Advanced Control Timer16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization  
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Page 40/106

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Memory and register map
Table 15.
General hardware register map (continued)
Address
0x00 50A0
0x00 50A1
0x00 50A2 to
0x00 50B2
0x00 50B3
0x00 50B4 to
0x00 50BF
0x00 50C0
0x00 50C1
0x00 50C2
0x00 50C3
0x00 50C4
0x00 50C5
0x00 50C6
0x00 50C7
0x00 50C8
0x00 50C9
0x00 50CA
0x00 50CB
0x00 50CC
0x00 50CD
0x00 50CE
to 0x00 50D0
0x00 50D1
WWDG
0x00 50D2
0x00 50D3 to
0x00 50DF
0x00 50E0
0x00 50E1
IWDG
0x00 50E2
0x00 50E3 to
0x00 50EF
0x00 50F0
0x00 50F1
0x00 50F2
40/106
Block
Register label
EXTI_CR1
External interrupt control register 1
ITC
EXTI_CR2
External interrupt control register 2
Reserved area (17 bytes)
RST
RST_SR
Reserved area (12 bytes)
CLK_ICKR
CLK
CLK_ECKR
Reserved area (1 byte)
CLK_CMSR
CLK_SWR
CLK_SWCR
CLK_CKDIVR
CLK_PCKENR1
CLK_CSSR
CLK
CLK_CCOR
Configurable clock control register
CLK_PCKENR2
CLK_HSITRIMR
HSI clock calibration trimming register
CLK_SWIMCCR
Reserved area (3 bytes)
WWDG_CR
WWDG_WR
Reserved area (13 bytes)
IWDG_KR
IWDG_PR
IWDG_RLR
Reserved area (13 bytes)
AWU_CSR1
AWU asynchronous prescaler buffer
AWU
AWU_APR
AWU_TBR
Doc ID 14395 Rev 8
STM8AF52/62xx, STM8AF51/61xx
Register name
Reset status register
Internal clock control register
External clock control register
Clock master status register
Clock master switch register
Clock switch control register
Clock divider register
Peripheral clock gating register 1
Clock security system register
Peripheral clock gating register 2
Reserved area (1 byte)
SWIM clock control register
WWDG control register
WWDR window register
IWDG key register
IWDG prescaler register
IWDG reload register
AWU control/status register 1
register
AWU timebase selection register
Reset
status
0x00
0x00
(1)
0xXX
0x01
0x00
0xE1
0xE1
0xXX
0x18
0xFF
0x00
0x00
0xFF
0x00
0bXXXX
XXX0
0x7F
0x7F
(2)
0xXX
0x00
0xFF
0x00
0x3F
0x00