STM8AF52AA STMicroelectronics, STM8AF52AA Datasheet - Page 79

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STM8AF52AA

Manufacturer Part Number
STM8AF52AA
Description
STM8AF52 CAN Line
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF52AA

Max Fcpu
24 MHz
Program Memory
32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memory
up to 2 Kbytes true data EEPROM; endurance 300 kcycles
Ram
2 Kbytes to 6 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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STM8AF52/62xx, STM8AF51/61xx
10.3.9
Table 42.
1. f
2. The pad has to be configured accordingly (fast mode).
3. Values based on design simulation and/or characterization results, and not tested in production.
4. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.
5. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
Symbol
t
t
t
h(NSS)
t
t
t
t
su(MI)
t
h(MO)
su(SI)
v(MO)
h(SO)
t
v(SO)
t
h(MI)
h(SI)
r(SCK)
f(SCK)
f
SCK
c(SCK)
SCK
(3)(4)
(3)
(3)(5)
(3)
(3)
(3)
(3)
< f
(3)
(3)
(3)
(3)
(3)
(3)
(3)
MASTER
SPI clock frequency
SPI clock rise and fall time Capacitive load: C = 30 pF
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output valid time
Data output hold time
SPI interface
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
conditions. t
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
SPI characteristics
/2.
Parameter
MASTER
= 1/f
Master mode
Slave mode
Slave mode
Slave mode
Master mode,
f
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Slave mode
(after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
MASTER
MASTER
Doc ID 14395 Rev 8
.
= 8 MHz, f
Conditions
MASTER
SCK
V
V
V
V
DD
DD
DD
DD
= 4 MHz
< 4.5 V
= 4.5 V to 5.5 V
< 4.5 V
= 4.5 V to 5.5 V
frequency, and V
Table 42
are derived from tests
4 * t
Electrical characteristics
DD
Min
110
MASTER
70
10
25
31
12
0
0
5
5
7
0
supply voltage
3* t
25
Max
140
6
8
MASTER
30
10
75
53
(1)
(1)
(2)
79/106
MHz
Unit
ns

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