STM8S903F3 STMicroelectronics, STM8S903F3 Datasheet
STM8S903F3
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STM8S903F3 Summary of contents
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... Internal low power 128 kHz RC • Clock security system with clock monitor • Power management: - Low power modes (wait, active-halt, halt) July 2011 STM8S903K3 STM8S903F3 - • Permanently active, low consumption power-on and power-down reset Interrupt management • Nested interrupt controller with 32 interrupts • ...
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... TIM6 - 8-bit basic timer ..............................................................................................16 4.13 Analog-to-digital converter (ADC1) ............................................................................17 4.14 Communication interfaces .........................................................................................17 4.14.1 UART1 ...............................................................................................17 4.14.2 SPI .....................................................................................................18 4.14.3 I²C ......................................................................................................18 5 Pinout and pin description ...................................................................................20 5.1 STM8S903F3 TSSOP20/SO20 pinout ........................................................................21 5.2 STM8S903F3 UFQFPN20 pinout ................................................................................22 5.3 TSSOP/SO/UFQFPN20 pin description ......................................................................23 5.4 STM8S903K3 UFQFPN32/LQFP32/SDIP32 pinout ....................................................24 5.5 UFQFPN/LQFP/SDIP32 pin description ......................................................................25 5.6 Alternate function remapping .......................................................................................27 6 Memory and register map .....................................................................................28 6 ...
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... STM8S903K3 STM8S903F3 9 Unique ID ................................................................................................................50 10 Electrical characteristics ....................................................................................51 10.1 Parameter conditions .................................................................................................51 10.1.1 Minimum and maximum values .........................................................51 10.1.2 Typical values .....................................................................................51 10.1.3 Typical curves ....................................................................................51 10.1.4 Loading capacitor ...............................................................................51 10.1.5 Pin input voltage .................................................................................51 10.2 Absolute maximum ratings ........................................................................................52 10.3 Operating conditions ..................................................................................................54 10.3.1 VCAP external capacitor ....................................................................55 10.3.2 Supply current characteristics ............................................................56 10.3.3 External clock sources and timing characteristics .............................66 10.3.4 Internal clock sources and timing characteristics ...............................68 10 ...
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... Table 12. Option byte description ...........................................................................................................44 Table 13. STM8S903K3 alternate function remapping bits [7:2] for 32-pin packages ...........................46 Table 14. STM8S903F3 alternate function remapping bits [7:2] for 20-pin packages ...........................47 Table 15. STM8S903K3 alternate function remapping bits [1:0] for 32-pin packages .........................102 Table 16. STM8S903F3 alternate function remapping bits [1:0] for 20-pin packages ...........................49 Table 17 ...
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... STM8S903K3 STM8S903F3 Table 48. ADC accuracy with R Table 49. ADC accuracy with R Table 50. EMS data ................................................................................................................................89 Table 51. EMI data .................................................................................................................................90 Table 52. ESD absolute maximum ratings .............................................................................................90 Table 53. Electrical sensitivities .............................................................................................................91 Table 54. 32-pin low profile quad flat package mechanical data .........................................................102 Table 55. 32-lead, ultra thin, fine pitch quad flat no-lead package mechanical data .............................94 Table 56 ...
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... List of figures List of figures Figure 1. Block diagram .........................................................................................................................10 Figure 2. Flash memory organization ....................................................................................................13 Figure 3. STM8S903F3 TSSOP20/SO20 pinout ...................................................................................24 Figure 4. STM8S903F3 UFQFPN20 pinout ...........................................................................................24 Figure 5. STM8S903K3 UFQFPN32/LQFP32 pinout ............................................................................24 Figure 6. STM8S903K3 SDIP32 pinout .................................................................................................25 Figure 7. Memory map ...........................................................................................................................28 Figure 8. Pin loading conditions .............................................................................................................51 Figure 9. Pin input voltage .....................................................................................................................52 Figure 10. f versus V ...
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... STM8S903K3 STM8S903F3 Figure 48. Recommended footprint for on-board emulation ..................................................................97 Figure 49. Recommended footprint without on-board emulation ...........................................................98 Figure 50. 32-lead shrink plastic DIP (400 ml) package ........................................................................98 Figure 51. 20-pin, 4.40 mm body, 0.65 mm pitch .................................................................................101 Figure 52. 20-lead, plastic small outline (300 mils) package ...............................................................101 Figure 53. STM8S903K3/F3 ordering information scheme ..................................................................104 ...
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... For information on the debug and SWIM (single wire interface module) refer to the STM8 SWIM communication protocol and debug module user manual (UM0470). • For information on the STM8 core, please refer to the STM8 CPU programming manual (PM0044). 8/115 DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 2 Description The STM8S903K3 and STM8S903F3 8-bit microcontrollers offer 8 Kbytes Flash program memory, plus integrated true data EEPROM. The STM8S microcontroller family reference manual (RM0016) refers to devices in this family as low-density. They provide the following benefits: performance, robustness, and reduced system cost. ...
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... Reset Detector POR BOR Clock to peripherals and core STM8 core Debug/SWIM SPI UART1 ADC1 Beeper DocID15590 Rev 6 STM8S903K3 STM8S903F3 XTAL 1-16 MHz RC int. 16 MHz RC int. 128 kHz Window WDG Independent WDG 8 Kbytes program Flash 640 bytes data EEPROM 1 Kbytes RAM Up to ...
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... STM8S903K3 STM8S903F3 4 Product overview The following section intends to give an overview of the basic features of the device functional modules and peripherals. For more detailed information please refer to the corresponding family reference manual (RM0016). 4.1 Central processing unit STM8 The 8-bit STM8 core is designed for code efficiency and performance. ...
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... The size of the UBC is programmable through the UBC option byte, in increments of 1 page (64-byte block) by programming the UBC option byte in ICP mode. This divides the program memory into two areas: • Main program memory Kbytes minus UBC • User-specific boot code (UBC): Configurable Kbytes 12/115 DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 The UBC area remains write-protected during in-application programming. This means that the MASS keys do not unlock the UBC area. It protects the memory used to store the boot program, specific code libraries, reset and interrupt vectors, the reset routine and usually the IAP and communication routines ...
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... Wakeup is triggered by external event or reset. 14/115 Peripheral Bit Peripheral clock clock UART1 PCKEN27 Reserved Reserved PCKEN26 Reserved SPI PCKEN25 Reserved PCKEN24 Reserved DocID15590 Rev 6 STM8S903K3 STM8S903F3 Bit Peripheral clock CKEN23 ADC PCKEN22 AWU PCKEN21 Reserved PCKEN20 Reserved ...
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... STM8S903K3 STM8S903F3 4.7 Watchdog timers The watchdog system is based on two independent timers providing maximum security to the applications. Activation of the watchdog timers is controlled by option bytes or by software. Once activated, the watchdogs cannot be disabled by the user program without performing a reset. Window watchdog timer The window watchdog is used to detect the occurrence of a software fault, usually generated by external interferences or by unexpected logical conditions, which cause the application program to abandon its normal sequence ...
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... Prescaler size (bits) TIM1 16 Any integer from 1 to 65536 TIM5 16 Any power of 2 from 1 to 32768 16/115 Table 3: TIM timer features Counting CAPCOM Complementary mode channels outputs Up/down DocID15590 Rev 6 STM8S903K3 STM8S903F3 Ext. Timer trigger synchronization/ chaining Yes Yes No ...
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... STM8S903K3 STM8S903F3 Timer Counter Prescaler size (bits) TIM6 8 Any power of 2 from 1 to 128 4.13 Analog-to-digital converter (ADC1) The STM8S003xx products contain a 10-bit successive approximation A/D converter (ADC1) with external multiplexed inputs channels and the following features: The STM8S903K3 family products contain a 10-bit successive approximation A/D converter ...
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... CRC calculation • 1 byte Tx and Rx buffer • Slave/master selection input pin 4.14.3 I²C • I²C master features: - Clock generation - Start and stop generation • I²C slave features: 18/115 /16) CPU /2) both for master and slave MASTER DocID15590 Rev 6 STM8S903K3 STM8S903F3 /16) and capable of CPU ...
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... STM8S903K3 STM8S903F3 - Programmable I2C address detection - Stop bit detection • Generation and detection of 7-bit/10-bit addressing and general call • Supports different communication speeds: - Standard speed (up to 100 kHz) - Fast speed (up to 400 kHz) DocID15590 Rev 6 Product overview 19/115 ...
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... Output T = True open drain Open drain Push pull Bold X (pin state after internal reset release). Unless otherwise specified, the pin state is the same during the reset phase and after the internal reset release. DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... AIN5/UART1_TX/PD5(HS) AIN6/UART1_RX/PD6(HS) [SPI_NSS]/TIM5_CH3/PA3(HS) 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function). Figure 3: STM8S903F3 TSSOP20/SO20 pinout ...
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... STM8S903F3 UFQFPN20 pinout OSCIN/PA1 OSCOUT/PA2 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function). 22/115 Figure 4: STM8S903F3 UFQFPN20 pinout NRST 15 ...
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... STM8S903K3 STM8S903F3 5.3 Pin description TSSOP20_SO20_UFQFPN20 Table 5: TSSOP20/SO20/UFQFPN20 pin description TSSOP UFQFPN Pin name Type SO20 NRST I/O ( PA1/ OSCIN I PA2/ OSCOUT I VCAP PA3/ TIM5_CH3 [SPI_NSS] I/O [UART1_TX PB5/ I2C_SDA [TIM1_BKIN] I PB4/ I2C_SCL [ADC_ETR] ...
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... NRST 2 OSCIN/PA1 3 OSCOUT/PA2 VCAP [UART1_RX] PF4 DocID15590 Rev 6 STM8S903K3 STM8S903F3 24 PC7 (HS)/SPI_MISO [TIM1_CH2] 23 PC6 (HS)/SPI_MOSI [TIM1_CH1] 22 PC5 (HS)/SPI_SCK [TIM5_CH1] 21 PC4 (HS)/TIM1_CH4/CLK_CCO [AIN2] [TIM1_CH2N] 20 PC3 (HS)/TIM1_CH3 [TLI] [TIM1_CH1N] 19 PC2 (HS)/TIM1_CH2 [TIM1_CH3N] 18 PC1 (HS)/TIM1_CH1/ [TIM1_CH2N] ...
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... STM8S903K3 STM8S903F3 AIN4/TIM5_CH2/ADC_ETR/PD3(HS) TIM5_CH1[UART1_CK]BEEP/PD4(HS) AIN5/UART1_TX/PD5(HS) AIN6/UART1_RX/PD6(HS) [TIM1_CH4]TLI/PD7(HS) [UART1_TX][SPI_NSS]/TIM5_CH3/PA3(HS) [TIM1_BKIN]I2C_SDA/PB5(T) 1. (HS) high sink capability. 2. (T) true open drain (P-buffer and protection diode alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function). ...
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... DocID15590 Rev 6 STM8S903K3 STM8S903F3 Main Default alternate function Alternate function after remap function [option bit (after reset Port B6 ( Port I C data Timer 1 - break input [AFR4 Port ...
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... STM8S903K3 STM8S903F3 5.6 Alternate function remapping As shown in the rightmost column of the pin description table, some alternate functions can be remapped at different I/O ports by programming one of eight AFR (alternate function remap) option bits. When the remapping option is active, the default alternate function is no longer available. ...
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... GPIO and periph. reg. 0x00 57FF 0x00 5800 Reserved 0x00 7EFF 0x00 7F00 CPU/SWIM/debug/ITC registers 0x00 7FFF 0x00 8000 32 interrupt vectors 0x00 807F Flash program memory 0x00 8080 (8 Kbytes) 0x00 9FFF 0x00 A000 Reserved 0x02 7FFF DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 6.2 Register map 6.2.1 I/O port hardware register map Address Block 0x00 5000 0x00 5001 0x00 5002 Port A 0x00 5003 0x00 5004 0x00 5005 0x00 5006 0x00 5007 Port B 0x00 5008 0x00 5009 0x00 500A 0x00 500B 0x00 500C Port C 0x00 500D ...
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... Flash complementary control register 2 FLASH _FPR Flash protection register FLASH _NFPR Flash complementary protection register FLASH _IAPSR Flash in-application programming status register FLASH _PUKR Flash program memory unprotection register DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0x00 0x00 (1) 0xXX 0x00 0x00 0x00 Reset status ...
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... STM8S903K3 STM8S903F3 Address Block Flash 0x00 5064 Reserved area (59 bytes) 0x00 5065 to 0x00 509F ITC 0x00 50A0 0x00 50A1 Reserved area (17 bytes) 0x00 50A2 to 0x00 50B2 RST 0x00 50B3 Reserved area (12 bytes) 0x00 50B4 to 0x00 50BF CLK 0x00 50C0 0x00 50C1 ...
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... AWU control/status register 1 AWU_APR AWU asynchronous prescaler buffer register AWU_TBR AWU timebase selection register BEEP_CSR BEEP control/status register SPI_CR1 SPI control register 1 SPI_CR2 SPI control register 2 DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0x00 0bXXXX XXX0 0x7F 0x7F (2) 0xXX 0x00 0xFF 0x00 ...
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... STM8S903K3 STM8S903F3 Address Block 0x00 5202 0x00 5203 0x00 5204 0x00 5205 0x00 5206 0x00 5207 Reserved area (8 bytes) 0x00 5208 to 0x00 520F 0x00 5210 0x00 5211 0x00 5212 0x00 5213 0x00 5214 0x00 5215 0x00 5216 0x00 5217 0x00 5218 ...
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... UART1_CR4 UART1 control register 4 UART1_CR5 UART1 control register 5 UART1_GTR UART1 guard time register UART1_PSCR UART1 precaler register TIM1_CR1 TIM1 control register 1 TIM1_CR2 TIM1 control register 2 DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0x00 0x02 0x00 0xC0 0xXX 0x00 0x00 0x00 0x00 0x00 ...
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... STM8S903K3 STM8S903F3 Address Block 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B 0x00 525C 0x00 525D 0x00 525E 0x00 525F 0x00 5260 0x00 5261 0x00 5262 0x00 5263 0x00 5264 ...
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... TIM5 slave mode control register TIM5_IER TIM5 interrupt enable register TIM5_SR1 TIM5 status register 1 TIM5_SR2 TIM5 status register 2 TIM5_EGR TIM5 event generation register TIM5_CCMR1 TIM5 capture/compare mode register 1 DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 ...
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... STM8S903K3 STM8S903F3 Address Block 0x00 5308 0x00 5309 0x00 530A 0x00 530B 00 530C0x 0x00 530D 0x00 530E 0x00 530F 0x00 5310 0x00 5311 0x00 5312 0x00 5313 0x00 5314 0x00 5315 0x00 5316 Reserved area (43 bytes) 0x00 5317 to 0x00 533F TIM6 ...
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... ADC data register high ADC_DRL ADC data register low ADC_TDRH ADC Schmitt trigger disable register high ADC_TDRL ADC Schmitt trigger disable register low ADC_HTRH ADC high threshold register high DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0x00 0x00 0x00 0x00 0x00 0xFF 0x00 ...
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... STM8S903K3 STM8S903F3 Address Block 0x00 5409 0x00 540A 0x00 540B 0x00 540C 0x00 540D 0x00 540E 0x00 540F Reserved area (1008 bytes) 0x00 5410 to 0x00 57FF (1) Depends on the previous reset source. (2) Write only register. 6.2.3 CPU/SWIM/debug module/interrupt controller registers Table 9: CPU/SWIM/debug module/interrupt controller registers ...
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... DM breakpoint 2 register low byte DM_CR1 DM debug module control register 1 DM_CR2 DM debug module control register 2 DM_CSR1 DM debug module control/status register 1 DM_CSR2 DM debug module control/status register 2 DocID15590 Rev 6 STM8S903K3 STM8S903F3 Reset status 0xFF 0x28 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF ...
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... STM8S903K3 STM8S903F3 Address Block 0x00 7F9A 0x00 7F9B to 0x00 7F9F (1) Accessible by debug module only Register label Register name DM_ENFCTR DM enable function register Reserved area (5 bytes) DocID15590 Rev 6 Memory and register map Reset status 0xFF 41/115 ...
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... Yes Yes Yes Yes Yes - Yes - - - - - - - - Yes - - DocID15590 Rev 6 STM8S903K3 STM8S903F3 Wakeup from Vector address active-halt mode Yes 0x00 8000 - 0x00 8004 - 0x00 8008 Yes 0x00 800C - 0x00 8010 (1) Yes 0x00 8014 Yes 0x00 8018 Yes 0x00 801C Yes ...
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... STM8S903K3 STM8S903F3 IRQ Source Description no. block 22 ADC1 ADC1 end of conversion/ analog watchdog interrupt 23 TIM6 TIM6 update/ overflow/ trigger 24 Flash EOP/ WR_PG_DIS Reserved (1) Except PA1 Wakeup from Wakeup from halt mode active-halt mode - - - - - - DocID15590 Rev 6 Interrupt vector mapping Vector address 0x00 8060 ...
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... TRIM NHSI NLSI_ TRIM EN EXT CLK NEXT CLK Table 12: Option byte description Description ROP[7:0] Memory readout protection (ROP) 0xAA: Enable readout protection (write access via SWIM protocol) DocID15590 Rev 6 STM8S903K3 STM8S903F3 Factory default setting 0x00 0x00 0xFF AFR2 AFR1 AFR0 ...
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... STM8S903K3 STM8S903F3 Option byte no. OPT1 OPT2 OPT3 Description Note: Refer to the family reference manual (RM0016) section on Flash/EEPROM memory readout protection for details. UBC[7:0] User boot code area 0x00: no UBC, no write-protection 0x01: Page 0 defined as UBC, memory write-protected 0x02: Pages defined as UBC, memory write-protected. ...
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... AFR7 Alternate function remapping option 7 0: AFR7 remapping option inactive: Default alternate functions 1: Port C3 alternate function = TIM1_CH1N; port C4 alternate function = TIM1_CH2N. AFR6 Alternate function remapping option 6 0: AFR6 remapping option inactive: Default alternate function 1: Port D7 alternate function = TIM1_CH4. DocID15590 Rev 6 STM8S903K3 STM8S903F3 (2) . (2) . ...
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... STM8S903K3 STM8S903F3 Option byte no. (1) Do not use more than one remapping option in the same port. (2) Refer to pinout description. Table 14: STM8S903F3 alternate function remapping bits [7:2] for 20-pin packages Option byte no. OPT2 (1) Description AFR5 Alternate function remapping option 5 0: AFR5 remapping option inactive: Default alternate function 1: Port D0 alternate function = CLK_CCO ...
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... AFR1 and AFR0 remapping options inactive: Default alternate functions 1 PC5 PC6 PC7 0 PA3 PD2 PD2 PC5 PC6 PC7 1 PC2 PC1 PE5 PA3 PF4 DocID15590 Rev 6 STM8S903K3 STM8S903F3 (2) . Alternate function mapping (1) TIM5_CH1 TIM1_CH1 TIM1_CH2 SPI_NSS TIM5_CH3 TIM5_CH3 TIM5_CH1 TIM1_CH1 TIM1_CH2 TIM1_CH3N TIM1_CH2N TIM1_CH1N UART1_TX UART1_RX ...
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... STM8S903K3 STM8S903F3 Table 16: STM8S903F3 alternate function remapping bits [1:0] for 20-pin packages AFR1 option bit value (1) Refer to pinout description. AFR0 option bit I/O port value 0 AFR1 and AFR0 remapping options inactive: Default alternate functions 1 PC5 PC6 PC7 0 PA3 PD2 PD2 PC5 ...
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... Wafer number 0x486A 0x486B 0x486C Lot number 0x486D 0x486E 0x486F 0x4870 50/115 Table 17: Unique ID registers (96 bits) Unique ID bits U_ID[7:0] U_ID[15:8] U_ID[23:16] U_ID[31:24] U_ID[39:32] U_ID[47:40] U_ID[55:48] U_ID[63:56] U_ID[71:64] U_ID[79:72] U_ID[87:80] U_ID[95:88] DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 10 Electrical characteristics 10.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 10.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100 % of the devices with an ambient temperature at T the selected temperature range) ...
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... Total current into V 52/115 Figure 9: Pin input voltage V IN Table 18: Voltage characteristics (1) (2) ) pins must always be connected to the external power supply SS while a negative injection is induced Table 19: Current characteristics power lines (source) DD DocID15590 Rev 6 STM8S903K3 STM8S903F3 STM8 pin Min Max -0.3 6.5 ( 0 0.3 ...
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... STM8S903K3 STM8S903F3 Symbol Ratings I Total current out of V VSS I IO Output current sunk by any I/O and control pin Output current source by any I/Os and control pin (3) (4) I INJ(PIN) Injected current on NRST pin Injected current on OSCIN pin Injected current on any other pin (3) ΣI INJ(PIN) ...
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... TSSOP20 A SO20W UFQFPN20 LQFP32 UFQFPN32 SDIP32 = 125 TSSOP20 A SO20W UFQFPN20 LQFP32 UFQFPN32 SDIP32 Maximum power dissipation Maximum power dissipation 6 suffix version 3 suffix version = ( Dmax Jmax DocID15590 Rev 6 STM8S903K3 STM8S903F3 Min Max 0 16 2.95 5.5 470 3300 - 0 182 - 1000 - 198 - 333 - 526 - 333 ...
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... STM8S903K3 STM8S903F3 (3) Τ is given by the test limit. Above this value the product behavior is not guaranteed. Jmax f CPU (MHz) Functionality not guaranteed in this area Table 22: Operating conditions at power-up/power-down Symbol Parameter t V VDD Reset release delay TEMP V Power-on reset IT+ ...
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... HSI RC osc. (16 MHz/ MASTER LSI RC osc. (128 kHz) HSE crystal osc. (16 MHz MASTER HSE user ext. clock (16 MHz) HSI RC osc. (16 MHz MASTER HSI RC osc. (16 MHz/8) DocID15590 Rev 6 STM8S903K3 STM8S903F3 EXT ESL Pin input voltage (no load (1) Typ Max 2 ...
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... STM8S903K3 STM8S903F3 Symbol Parameter Conditions f CPU 125 kHz f CPU 15.625 kHz f CPU 128 kHz (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. Table 24: Total current consumption with code execution in run mode at V Symbol Parameter ...
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... HSE user ext. clock (16 MHz) HSI RC osc. (16 MHz) /128 = HSI RC osc. (16 MHz) /128 = HSI RC osc. (16 MHz/8) = MASTER LSI RC osc. (128 kHz) HSE crystal osc. (16 MHz CPU MASTER 16 MHz HSE user ext. clock (16 MHz) DocID15590 Rev 6 STM8S903K3 STM8S903F3 Typ Unit (1) Max 0.42 0. Typ Unit (1) Max 1.6 1.1 1.3 0.89 1.1 0.7 0.88 (2) 0 ...
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... STM8S903K3 STM8S903F3 Symbol Parameter Conditions (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. 10.3.2.3 Total current consumption in active halt mode Table 27: Total current consumption in active halt mode at V Conditions Main Symbol Parameter voltage regulator (MVR) ...
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... MHz) LSI RC osc. Operating mode (128 kHz) HSE crystal osc. (16 MHz) Power-down mode LSI RC osc. (128 kHz) Operating mode LSI RC osc. (128 kHz) Power-down mode DocID15590 Rev 6 STM8S903K3 STM8S903F3 Max Max 125 Typ Unit °C °C ( ...
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... STM8S903K3 STM8S903F3 10.3.2.4 Total current consumption in halt mode Table 29: Total current consumption in halt mode at V Symbol Parameter Supply current in halt mode I DD(H) (1) Data based on characterization results, not tested in production Table 30: Total current consumption in halt mode at V Symbol Parameter Supply current in halt mode ...
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... MVR voltage Flash in regulator power-down (4) (5) off mode (5) Flash in operating mode (5) Flash in power-down mode CPU. Conditions 3 and T DD DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) Typ Max HSI (6) (after 48 wakeup) HSI (6) (after 50 wakeup Typ (1) Max 400 300 150 . A Unit Unit μ ...
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... STM8S903K3 STM8S903F3 HSI internal RC/f Symbol Parameter I TIM1 supply current DD(TIM1) I TIM5 supply current DD(TIM5) I TIM6 timer supply current DD(TIM6) I UART1 supply current DD(UART1) I SPI supply current DD(SPI DD ADC1 supply current when converting DD(ADC1) (1) Data based on a differential I counter running at 16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production ...
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... Electrical characteristics Figure 13: Typ I Figure 14: Typ I 64/115 vs. f HSE user external clock, V DD(RUN) CPU vs. V HSI RC osc, f DD(RUN) DD DocID15590 Rev 6 STM8S903K3 STM8S903F3 = MHz CPU ...
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... STM8S903K3 STM8S903F3 Figure 15: Typ I Figure 16: Typ I Figure 17: Typ I vs. V HSE user external clock, f DD(WFI) DD vs. f HSE user external clock, V DD(WFI) CPU vs. V HSI RC osc, f DD(WFI) DD DocID15590 Rev 6 Electrical characteristics = 16 MHz CPU = MHz CPU 65/115 ...
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... External high speed HSE oscillator frequency 66/115 DD Conditions V < V < Figure 18: HSE external clocksource External clock source OSCIN Table 35: HSE oscillator characteristics Conditions Min DocID15590 Rev 6 STM8S903K3 STM8S903F3 and Min Max HSE ...
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... STM8S903K3 STM8S903F3 Symbol Parameter R Feedback resistor F (1) C Recommended load (2) capacitance I HSE oscillator power DD(HSE) consumption g Oscillator m transconductance (4) t Startup time SU(HSE) ( approximately equivalent crystal Cload. (2) The oscillator selection can be optimized in terms of supply current using a high quality resonator with small R value ...
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... CLK_HSITRIMR register for given V and (1) conditions ( 25° °C ≤ ≤ 85 °C A 2.95 ≤ V ≤ 5.5 V,-40 °C DD ≤ T ≤ 125 °C A DocID15590 Rev 6 STM8S903K3 STM8S903F3 . A Min Typ Max 16 (3) 1 -2.0 2.0 (2) (2) -3.0 3.0 (3) 1.0 (2) 250 170 Unit MHz % μs ...
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... STM8S903K3 STM8S903F3 Figure 20: Typical HSI frequency variation vs V Low speed internal RC oscillator (LSI) Subject to general operating conditions for V Symbol Parameter f Frequency LSI t LSI oscillator wake-up time su(LSI) I LSI oscillator power consumption DD(LSI) Figure 21: Typical LSI frequency variation vs V and T DD Table 37: LSI oscillator characteristics ...
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... A 70/115 Table 38: RAM and hardware registers Conditions (1) Halt mode (or reset) Conditions f ≤ 16 MHz CPU ( +85 ° +125 °C ( 55°C RET DocID15590 Rev 6 STM8S903K3 STM8S903F3 Min Unit ( IT-max IT-max Typ Max Unit (1) Min 2. 3. ...
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... STM8S903K3 STM8S903F3 Symbol Parameter Data retention (data memory) after 300k erase/write cycles +125 ° Supply current (Flash DD programming or erasing for 1 to 128 bytes) (1) Data based on characterization results, not tested in production. (2) The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes even when a write/erase operation addresses a single byte ...
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... Data based on characterisation results, not tested in production. Figure 22: Typical V Figure 23: Typical pull-up resistance vs V 72/115 Conditions Min V ≤ V ≤ Injection current ±4 mA and temperatures DocID15590 Rev 6 STM8S903K3 STM8S903F3 Typ Max Unit (2) ±250 nA (2) ±1 μ temperatures ...
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... STM8S903K3 STM8S903F3 Figure 24: Typical pull-up current vs V Symbol Parameter Output low level with 8 pins sunk V OL Output low level with 4 pins sunk Output high level with 8 pins sourced V OH Output high level with 4 pins sourced (1) Data based on characterization results, not tested in production ...
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... OH Output high level with 4 pins sourced (1) Data based on characterization results, not tested in production 74/115 Table 43: Output driving current (high sink ports) Figure 25: Typ (standard ports DocID15590 Rev 6 STM8S903K3 STM8S903F3 Conditions Min Max mA mA, ...
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... STM8S903K3 STM8S903F3 Figure 27: Typ. V Figure 26: Typ 3.3 V (standard ports (true open drain ports DocID15590 Rev 6 Electrical characteristics 75/115 ...
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... Electrical characteristics Figure 28: Typ. V 76/115 @ V = 3.3 V (true open drain ports Figure 29: Typ (high sink ports DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 Figure 30: Typ Figure 31: Typ DocID15590 Rev 6 Electrical characteristics = 3.3 V (high sink ports (standard ports) DD 77/115 ...
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... Electrical characteristics Figure 32: Typ. V 78/115 - Figure 33: Typ DocID15590 Rev 6 STM8S903K3 STM8S903F3 = 3.3 V (standard ports (high sink ports) DD ...
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... STM8S903K3 STM8S903F3 Figure 34: Typ. V 10.3.7 Reset pin characteristics Subject to general operating conditions for V Symbol Parameter V IL(NRST) NRST input low (1) level voltage V IH(NRST) NRST input high level voltage V OL(NRST) NRST output low level voltage R PU(NRST) NRST pull-up (2) resistor t I FP(NRST) NRST input filtered ...
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... The R pull-up equivalent resistor is based on a resistive transistor PU (3) Data guaranteed by design, not tested in production. Figure 35: Typical NRST V Figure 36: Typical NRST pull-up resistance vs V 80/115 Conditions Min 20 and DocID15590 Rev 6 STM8S903K3 STM8S903F3 Typ Max Unit @ 4 temperatures temperatures DD μs ...
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... STM8S903K3 STM8S903F3 Figure 37: Typical NRST pull-up current vs V The reset network shown in the following figure protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below V I/O static characteristics For power consumption sensitive applications, the external reset capacitor value can be reduced to limit the charge/discharge current ...
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... Slave mode Master mode Slave mode Slave mode Slave mode Slave mode (after enable edge) Master mode (after enable edge) Slave mode (after enable edge) Master mode (after enable edge) DocID15590 Rev 6 STM8S903K3 STM8S903F3 Min Max Unit 0 8 MHz ( MHz ...
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... STM8S903K3 STM8S903F3 (1) Parameters are given by selecting 10 MHz I/O output frequency. (2) Data characterization in progress. (3) Values based on design simulation and/or characterization results, and not tested in production. (4) Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data. ...
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... MS BIN t h(MI OUT t v(MO) 2 Table 46 characteristics Standard mode I (2) Min 4.7 4.0 250 (3) 0 4.0 4.7 DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) t r(SCK) t f(SCK LSB OUT LSB OUT t h(MO Fast mode I C (2) (2) Max Min Max 1.3 0.6 100 ...
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... STM8S903K3 STM8S903F3 Symbol Parameter t STOP condition setup time su(STO) t STOP to START condition time w(STO:ST A) (bus free) C Capacitive load for each bus line b ( must be at least 8 MHz to achieve max fast I MASTER (2) 2 Data based on standard I (3) The maximum hold time of the start condition has only to be met if the interface does not stretch the ...
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... ADC f ADC f ADC (2) f ADC f ADC f ADC (2) f ADC f ADC f ADC (2) f ADC f ADC DocID15590 Rev 6 STM8S903K3 STM8S903F3 Min Typ Max 1.19 1.22 3 0.75 0.5 7 3.5 2. max) can be charged/discharged AIN After the end of the sample time t S. < 10 kΩ AIN DD Typ ...
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... STM8S903K3 STM8S903F3 Symbol Parameter |E | Integral linearity error L (1) Data based on characterisation results, not tested in production. (2) ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject negative current ...
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... Susceptibility tests are performed on a sample basis during product characterization. 10.3.11.1 Functional EMS (electromagnetic susceptibility) While executing a simple application (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until a failure occurs (indicated by the LEDs). 88/115 Figure 43: ADC accuracy characteristics Figure 44: Typical application with ADC DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 • FESD: Functional electrostatic discharge (positive and negative) is applied on all pins of the device until a functional disturbance occurs. This test conforms with the IEC 61000-4-2 standard. • FTB: A burst of fast transient voltage (positive and negative) is applied to V through a 100 pF capacitor, until a functional disturbance occurs. This test conforms with the IEC 61000-4-4 standard ...
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... MHz to Conforming to 130 MHz SAE IEC 61967-2 130 MHz to 1 GHz SAE EMI level Table 52: ESD absolute maximum ratings Conditions T = 25°C, conforming to A JESD22-A114 DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) Max f /f HSE CPU Unit 16 MHz/ 16 MHz/ 8 MHz 16 MHz dBμV ...
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... STM8S903K3 STM8S903F3 Symbol Ratings V ESD(CDM) Electrostatic discharge voltage (Charge device model) (1) Data based on characterization results, not tested in production 10.3.11.6 Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage (applied to each power supply pin) • ...
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... Typ Max 1.600 0.150 1.400 1.450 0.370 0.450 0.200 9.000 9.200 7.000 7.200 DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) inches Min Typ 0.0020 0.0531 0.0551 0.0118 0.0146 0.0035 0.3465 0.3543 0.2677 0.2756 ® ® ...
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... STM8S903K3 STM8S903F3 Dim. mm Min D3 E 8.800 E1 6.800 0.450 L1 k 0.0° ccc (1) Values in inches are converted from mm and rounded to 4 decimal digits inches Typ Max Min 5.600 9.000 9.200 0.3465 7.000 7.200 0.2677 5.600 0.800 0.600 0.750 0.0177 1.000 3.5° 7.0° ...
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... Dimensions are in millimeters. Table 55: 32-lead, ultra thin, fine pitch quad flat no-lead package mechanical data Dim. mm Min 94/115 Typ Max 0.500 0.550 0.600 0 0.020 0.050 0.200 DocID15590 Rev 6 STM8S903K3 STM8S903F3 AOB8_ME (1) inches Min Typ Max 0.0197 0.0217 0.0236 0.0008 0.0020 0.0079 ...
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... STM8S903K3 STM8S903F3 Dim. mm Min ddd (1) Values in inches are converted from mm and rounded to 4 decimal digits. 11.3 20-lead UFQFPN package mechanical data Figure 47: 20-lead, ultra thin, fine pitch quad flat no-lead package outline ( Drawing is not to scale. Typ Max 0 ...
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... DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) Typ Max 0.1181 0.1181 0.0217 0.0236 0.0008 0.0020 0.0060 0.0197 0.0217 0.0236 0.0138 0.0157 0.0059 0.0079 0.0098 0.0118 ...
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... STM8S903K3 STM8S903F3 11.4 UFQFPN recommended footprint Figure 48: Recommended footprint for on-board emulation 1. Drawing is not to scale 0.5mm 4mm [0.157"] 1.65mm [0.065"] 0.3mm [0.012"] 4mm [0.157"] Bottom view DocID15590 Rev 6 Package information 0.8mm [0.032"] 0.5mm 0.9mm [0.035"] ai15319 97/115 ...
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... Package information Figure 49: Recommended footprint without on-board emulation 1. Drawing is not to scale 2. Dimensions are in millimeters 11.5 SDIP32 package mechanical data 98/115 Figure 50: 32-lead shrink plastic DIP (400 ml) package DocID15590 Rev 6 STM8S903K3 STM8S903F3 76_ME ...
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... STM8S903K3 STM8S903F3 Table 57: 32-lead shrink plastic DIP (400 ml) package mechanical data Dim. mm Min 27.430 (1) Values in inches are converted from mm and rounded to 4 decimal digits Typ Max 3.556 3.759 5.080 0.508 3.048 3.556 4.572 0.356 0.457 ...
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... DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) inches Min Typ 0.0020 0.0315 0.0394 0.0075 0.0035 0.2520 0.2559 0.2441 0.2520 0.1693 ...
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... STM8S903K3 STM8S903F3 Dim. mm Min k aaa (1) Values in inches are converted from mm and rounded to 4 decimal digits 11.7 20-pin SO package mechanical data Figure 52: 20-lead, plastic small outline (300 mils) package Table 59: 20-lead, plastic small outline (300 mils) mechanical data Dim. mm Min 12.600 ...
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... Watts. This is the maximum chip internal Σ(( taking into account the actual OH) OH Table 60: Thermal characteristics (1) DocID15590 Rev 6 STM8S903K3 STM8S903F3 (1) inches Min Typ 0.3937 0.0098 0.0157 0.0° ) must never exceed the values given degrees Celsius, may be calculated using + P ) INTmax I/Omax ...
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... STM8S903K3 STM8S903F3 Symbol Parameter Θ JA Thermal resistance junction-ambient UFQFPN20 - Θ JA Thermal resistance junction-ambient LQFP32 - Θ JA Thermal resistance junction-ambient UFQFPN32 - Θ JA Thermal resistance junction-ambient SDIP32 - 400 mils (1) Thermal resistances are based on JEDEC JESD51-2 with 4-layer PCB in a natural convection environment ...
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... For a list of available options (e.g. memory size, package) and orderable part numbers or for further information on any aspect of this device, please go to www.st.com or contact the ST Sales Office nearest to you. 12.1 STM8S903K3/F3 FASTROM microcontroller option list (last update: April 2010) 104/115 STM8 S 903 K 3 (2) DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... UFQFPN32: 1 line of 7 characters max: " _" UFQFPN20: 1 line of 4 characters max: " " Three characters are reserved for code identification. Temperature range [ ] -40°C to +85° -40°C to +125°C ........................................................................................................... ........................................................................................................... ........................................................................................................... ........................................................................................................... FASTROM code name is assigned by STMicroelectronics 8 Kbyte [ ] STM8S903F3 [ ] STM8S903F3 [ ] STM8S903F3 [ ] STM8S903K3 [ ] STM8S903K3 DocID15590 Rev 6 Ordering information 105/115 ...
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... Do not use more than one remapping option in the same port. 106/115 Fixed value TRAP instruction opcode Illegal opcode (causes a reset when executed Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set [ ] 0: Reset [ ] 1: Set DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 AFR1, AFR0 (check only one option) AFR2 (check only one option) AFR3 (check only one option) AFR4 (check only one option) AFR5 (check only one option) AFR6 (check only one option) AFR7 (check only one option 00: Remapping options inactive. Default alternate functions used ...
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... Ordering information OPT2 alternate function remapping for STM8S903F3 Do not use more than one remapping option in the same port. AFR1, AFR0 (check only one option) AFR2 AFR3 (check only one option) AFR4 (check only one option) AFR5 AFR6 AFR7 (check only one option) ...
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... STM8S903K3 STM8S903F3 IWDG_HW (check only one option) LSI_EN (check only one option) HSITRIM (check only one option) OPT4 wakeup PRSC (check only one option) CKAWUSEL (check only one option) EXTCLK (check only one option) OPT5 crystal oscillator stabilization HSECNT (check only one option) ...
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... STMicroelectronics that includes ST Visual Develop (STVD) IDE and the ST Visual Programmer (STVP) software interface. STVD provides seamless integration of the Cosmic and Raisonance C compilers for STM8, which are available in a free version that outputs Kbytes of code. 110/115 DocID15590 Rev 6 STM8S903K3 STM8S903F3 ...
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... STM8S903K3 STM8S903F3 13.2.1 STM8 toolset STM8 toolset with STVD integrated development environment and STVP programming software is available for free download at www.st.com/mcu. This package includes: ST Visual Develop – Full-featured integrated development environment from ST, featuring • Seamless integration of C and ASM toolsets • ...
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... Table 49: ADC accuracy with RAIN < 10 kΩ RAIN, VDD = 3 Added SO20W, TSSOP20, SDIP32, and UFQFPN32 packages. Added STM8S903F3 part number. Updated datasheet status to full datasheet. Updated definition of alternate function remapping option in Table 4: Legend/abbreviations for pinout tables Updated Px_IDR reset value in register map table ...
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... Table 14: STM8S903F3 alternate function remapping bits [7:2] for 20-pin packages. Changed title of Table 15: STM8S903K3 alternate function remapping bits [1:0] for 32-pin Added Table 16: STM8S903F3 alternate function remapping bits [1:0] for 20-pin packages. Reset pin characteristics: replaced 0.01 µF with 0.1 µF in the "Recommended reset pin protection" diagram. Added ...
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... STM8S903K3/F3 FASTROM microcontroller option list. Added note for OPT1 option list. Updated OPT2 option list for STM8S903K3 and created OPT2 option list for STM8S903F3 in microcontroller option list. Updated UART1 interrupt vector addresses in table Interrupt mapping Updated note related to true open-drain outputs in ...
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... STM8S903K3 STM8S903F3 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at anytime, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...