STM8S207RB STMicroelectronics, STM8S207RB Datasheet - Page 46

• Manufacturer Part Number: STM8S207RB
• Description: Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S207RB

• Max Fcpu: up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz
• Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
• Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles
• Ram: up to 6 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

Option bytes
8
Table 12.
46/103
4800h
4801h
4802h
4803h
4804h
4805h
4806h
4807h
4808h
4809h
480Ah
480Bh
480Ch
480Dh
480Eh
487Eh
487Fh
Addr.
Read-out
protection
(ROP)
code(UBC)
Alternate
function
remapping
(AFR)
Watchdog
option
Clock option
HSE clock
startup
Reserved
Flash wait
states
User boot
Bootloader
Option
name
Option bytes
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in
application in IAP mode, except the ROP option that can only be modified in ICP mode (via
SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM
communication protocol and debug module user manual (UM0470) for information on SWIM
programming procedures.
Option bytes
OPT0
OPT1
NOPT1
OPT2
NOPT2
OPT3
NOPT3
OPT4
NOPT4
OPT5
NOPT5
OPT6
NOPT6
OPT7
NOPT7
OPTBL
NOPTBL
byte no.
Option
Table 12: Option bytes
NAFR7
AFR7
7
NAFR6
AFR6
6
Reserved
Reserved
Reserved
Reserved
Doc ID 14733 Rev 12
below. Option bytes can also be modified ‘on the fly’ by the
NAFR5
AFR5
5
NAFR4
Reserved
Reserved
AFR4
4
Option bits
NHSECNT[7:0]
HSECNT[7:0]
NUBC[7:0]
Reserved
Reserved
ROP[7:0]
UBC[7:0]
NBL[7:0]
BL[7:0]
NAFR3
AFR3
NEXT
NLSI
_EN
_EN
EXT
CLK
CLK
LSI
3
NCKAWUS
CKAWU
NIWDG
NAFR2
IWDG
AFR2
_HW
_HW
SEL
EL
2
STM8S207xx, STM8S208xx
NWWDG
WWDG
NAFR1
AFR1
_HW
_HW
PRS
NPR
SC1
C1
1
Nwait state
Wait state
NWWDG
WWDG
NAFR0
_HALT
_HALT
AFR0
NPR
PRS
SC0
C0
0
Factory
default
setting
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h