STM8AF52A8 STMicroelectronics, STM8AF52A8 Datasheet - Page 77

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STM8AF52A8

Manufacturer Part Number
STM8AF52A8
Description
STM8AF52 CAN Line
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF52A8

Max Fcpu
24 MHz
Program Memory
32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memory
up to 2 Kbytes true data EEPROM; endurance 300 kcycles
Ram
2 Kbytes to 6 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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STM8AF52/62xx, STM8AF51/61xx
Figure 36. Typical NRST pull-up resistance R
Figure 37. Typical NRST pull-up current I
The reset network shown in
must ensure that the level on the NRST pin can go below V
characteristics), otherwise the reset is not taken into account internally.
For power consumption sensitive applications, the external reset capacitor value can be
reduced to limit the charge/discharge current. If NRST signal is used to reset external
circuitry, attention must be taken to the charge/discharge time of the external capacitor to
fulfill the external devices reset timing conditions. Minimum recommended capacity is 10 nF.
60
55
50
45
40
35
30
140
120
100
80
60
40
20
2.5
0
0
3
Figure 38
1
Doc ID 14395 Rev 8
3.5
2
protects the device against parasitic resets. The user
4
V
pu
V
DD
DD
3
vs V
[V]
[V]
PU
4.5
DD
vs V
4
DD
5
IL
max (see
Electrical characteristics
5
5.5
Table 39: I/O static
-40°C
25°C
85°C
125°C
-40°C
25°C
85°C
125°C
6
6
77/106

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