ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 100

• Manufacturer Part Number: ST7LIT10BF1
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT10BF1

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

ST7LITE1xB
11.6 ANALOG COMPARATOR (CMP)
11.6.1 Introduction
The CMP block consists of an analog comparator
and an internal voltage reference. The voltage ref-
erence can be external or internal, selectable un-
der program control. The comparator input pins
COMPIN+ and COMPIN- are also connected to
the A/D converter (ADC).
11.6.2 Main Features
11.6.2.1 On-chip Analog Comparator
The analog comparator compares the voltage at
two input pins COMPIN+ and COMPIN- which are
connected to VP and VN at the comparator input.
When the analog input at COMPIN+ is less than
the analog input at COMPIN-, the output of the
comparator is 0. When the analog input at
COMPIN+ is greater than the analog input at
COMPIN-, the output of the comparator is 1.
The result of the comparison as 0 or 1 at COM-
POUT is shown in
Note:
To obtain a stable result, the comparator requires
a stabilization time of 500ns. Please refer to
tion 13.12 on page
Table 19. Comparison Result
11.6.2.2
Voltage Reference
The voltage reference module can be configured
to connect the comparator pin COMPIN- to one of
the following:
-
-
-
1) Fixed Internal Voltage Bandgap
2) Programmable Internal Voltage Reference
100/159
The voltage reference module can generate a
fixed voltage reference of 1.2V on the VN input.
This is done by setting the VCBGR bit in the
VREFCR register.
Fixed internal voltage bandgap
Programmable internal reference voltage
External voltage reference
CINV
0
1
Programmable
Input Conditions
VP > VN
VN > VP
VP > VN
VN > VP
Figure 62 on page
143.
External/Internal
COMPOUT
101.
0
1
1
0
sec-
3) External Reference Voltage
11.6.3 Functional Description
To make an analog comparison, the CMPON bit in
the CMPCR register must be set to power-on the
comparator and internal voltage reference mod-
ule.
The VP comparator input is mapped on PB0 and is
also connected to ADC channel 0.
The VN comparator input is mapped on PB4 for
external voltage input, and is also connected to
ADC channel 4.
The internal voltage reference can provide a range
of different voltages to the comparator VN input,
selected by several bits in the VREFCR register,
as described in
To select pins PB0 and PB4 for A/D conversion,
(default reset state), channel 0 or 4 must be select-
ed through the channel selection bits in the ADCC-
SR register (refer to
The comparator output is connected to pin PA7
when the COUT bit in the CMPCR register is set.
The comparator output is also connected internally
to the break function of the 12-bit Autoreload Tim-
er (refer to
When the Comparator is OFF, the output value of
comparator is ‘1’.
Important note: To avoid spurious toggling of the
output of the comparator due to noise on the volt-
age reference, it is recommended to enable the
hysteresis through the CHYST bit in the CMPCR
register.
The internal voltage reference module can pro-
vide 16 distinct internally generated voltage lev-
els from 3.2V to 0.2V each at a step of 0.2V on
comparator pin VN. The voltage is selected
through the VR[3:0] bits in the VREFCR regis-
ter.
If a reference voltage other than that generated
by the internal voltage reference module is
required, COMPIN- can be connected to an
external voltage source. This configuration can
be selected by setting the VCEXT bit in the
VREFCR register.
Section
Table
11.2)
Section
20.
11.5.6)