ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 103

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
ANALOG COMPARATOR (Cont’d)
Bit 4 = CMPIF Comparator Interrupt Flag
This bit is set by hardware when interrupt is gener-
ated at the rising edge (CINV = 0) or falling edge
(CINV = 1) of comparator output. This bit is
cleared by reading the CMPCR register. Writing to
this bit does not change the value.
0 : Comparator interrupt flag cleared
1 : Comparator interrupt flag set and can generate
Bit 3 : CMPIE Comparator Interrupt Enable
This bit is set or reset by software and cleared by
hardware reset. This bit enables or disables the in-
terrupt generation depending on interrupt flag
0: Interrupt not generated
1: Interrupt generated if interrupt flag is set
Note:
This bit should be set to enable interrupt only after
the comparator has been switched ON, i.e. when
CMPON is set.
Once CMPON bit is set, it is recommended to wait
the specified stabilization time before setting
CMPIE bit in order to avoid a spurious interrupt
(see
Bit 2 : CMP Comparator Output
This bit is set or reset by software and cleared by
hardware reset. It stores the value of comparator
output.
Table 21. Analog Comparator Register Map and Reset Values
Address
interrupt if CMPIE is set.
002Ch
002Dh
(Hex.)
section 13.12 on page
VREFCR
Reset Value
CMPCR
Reset value
Register
Label
VCEXT
CHYST
143).
7
0
1
VCBGR
6
0
0
-
CINV
VR3
5
0
0
Bit 1 = COUT Comparator Output Enable on Port
This bit is set or cleared by software. When this bit
is set, the comparator output is available on PA7
port.
0 : Comparator output not connected to PA7
1 : Comparator output connected to PA7
Bit 0 : CMPON Comparator ON/OFF
This bit is set or cleared by software and reset by
hardware reset. This bit is used to switch ON/OFF
the comparator, internal voltage reference and
current bias which provides 4µA current to both.
0: Comparator, Internal Voltage Reference, Bias
1: Comparator, Internal Voltage Reference, Bias
Note: For the comparator interrupt generation, it
takes 250ns delay from comparator output change
to rising or falling edge of interrupt generated.
OFF (in power-down state).
ON
CMPIF
VR2
4
0
0
CMPIE
VR1
3
0
0
CMP
VR0
2
0
0
COUT
ST7LITE1xB
1
0
0
-
CMPON
103/159
0
0
0
-

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