ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 130

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
ST7LITE1xB
I/O PORT PIN CHARACTERISTICS (Cont’d)
13.8.2 Output Driving Current
Subject to general operating conditions for V
Notes:
1. The I
(I/O ports and control pins) must not exceed I
2. The I
I
3. Not tested in production, based on characterization results.
130/159
IO
Symbol
V
V
V
V
V
V
OH
OH
(I/O ports and control pins) must not exceed I
OL
OL
OH
OL
1)3)
1)3)
2)3)
2)3)
1)
2)
IO
IO
current sourced must always respect the absolute maximum rating specified in
current sunk must always respect the absolute maximum rating specified in
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
(see
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
(see
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
(see
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
(see
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
(see
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
(see
Figure
Figure
Figure
Figure
Figure
Figure
82)
87)
101)
83)
89)
95)
Parameter
VSS
VDD
.
(Figure
DD
.
, f
CPU
94)
, and T
I
I
I
I
I
I
I
I
I
I
I
I
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
A
=+5mA T
=+2mA T
=+20mA,T
=+8mA T
=-5mA, T
=-2mA T
=+2mA T
=+8mA T
=-2mA T
=+2mA T
=+8mA T
=-2mA T
Conditions
unless otherwise specified.
A
A
A
A
A
A
A
A
A
A
A
A
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
≤125°C
Section 13.2.2
Section 13.2.2
V
V
V
V
DD
DD
DD
DD
Min
-1.5
-0.8
-0.8
-0.9
and the sum of I
Max
0.75
1.0
0.4
1.3
0.5
0.5
0.6
0.6
and the sum of
Unit
V
IO

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