ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 45

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
POWER SAVING MODES (Cont’d)
Similarities with Halt mode
The following AWUFH mode behaviour is the
same as normal Halt mode:
– The MCU can exit AWUFH mode by means of
– When entering AWUFH mode, the I bit in the CC
Figure 30. AWUF Halt Timing Diagram
AWUFH interrupt
f
any interrupt with exit from Halt capability or a re-
set (see
register is forced to 0 to enable interrupts. There-
fore, if an interrupt is pending, the MCU wakes
up immediately.
f
AWU_RC
CPU
Section 9.4 HALT
RUN MODE
MODE).
HALT MODE
t
AWU
– In AWUFH mode, the main oscillator is turned off
– The compatibility of Watchdog operation with
causing all internal processing to be stopped, in-
cluding the operation of the on-chip peripherals.
None of the peripherals are clocked except those
which get their clock supply from another clock
generator (such as an external or auxiliary oscil-
lator like the AWU oscillator).
AWUFH mode is configured by the WDGHALT
option bit in the option byte. Depending on this
setting, the HALT instruction when executed
while the Watchdog system is enabled, can gen-
erate a Watchdog RESET.
256 OR 4096 t
CPU
RUN MODE
ST7LITE1xB
Clear
by software
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