ST7LIT10BF1 STMicroelectronics, ST7LIT10BF1 Datasheet - Page 53

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ST7LIT10BF1

Manufacturer Part Number
ST7LIT10BF1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT10BF1

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
I/O PORTS (Cont’d)
10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION
The I/O port register configurations are summa-
rised as follows.
Standard Ports
PA7:0, PB6:0
PC1:0 (multiplexed with OSC1,OSC2)
The selection between OSC1 or PC0 and OSC2 or
PC1 is done by option byte. Refer to
on page
on PC1:0.
Note: PCOR not implemented but p-transistor al-
ways active in output mode (refer to
page
Table 10. Port Configuration (Standard ports)
Note: On ports where the external interrupt capability is selected using the EISR register, the configura-
tion will be as follows:
Table 11. I/O Port Register Map and Reset Values
floating input
pull-up input
open drain output
push-pull output
floating input
push-pull output
Address
(Hex.)
0000h
0001h
50)
Port A
Port B
Port A
Port B
Port
Port
149. Interrupt capability is not available
PADR
Reset Value
PADDR
Reset Value
MODE
Register
Label
MODE
PA7:0
PB6:0
PA7:0
PB6:0
Pin name
Pin name
MSB
MSB
7
1
0
DDR
0
0
1
1
OR = 0
OR = 0
floating
floating
floating
floating
Figure 32 on
section 15.1
6
1
0
DDR
OR
0
1
0
1
0
1
Input
Input
5
1
0
pull-up interrupt
pull-up interrupt
Interrupt Ports
Ports where the external interrupt capability is
selected using the EISR register
OR = 1
OR = 1
floating input
pull-up interrupt input
open drain output
push-pull output
pull-up
pull-up
4
1
0
MODE
3
1
0
open drain
open drain
open drain
open drain
OR = 0
OR = 0
2
1
0
Output
Output
1
1
0
ST7LITE1xB
DDR
0
0
1
1
push-pull
push-pull
push-pull
push-pull
OR = 1
OR = 1
LSB
LSB
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OR
0
1
0
0
1
0
1
1

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