DS2432 Maxim, DS2432 Datasheet

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DS2432

Manufacturer Part Number
DS2432
Description
The DS2432 combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to five user read/write bytes, a 512-bit SHA-1 engine, and a fully-featured 1-Wire interface in a single chip
Manufacturer
Maxim
Datasheet

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FEATURES
 1128
 On-Chip 512-Bit ISO/IEC 10118-3 SHA-1
 Write Access Requires Knowledge of the
 Secret and Data Memory Can Be Write
 Unique, Factory-Lasered and Tested 64-Bit
 Built-In
 Reduces Control, Address, Data, and Power
 Directly Connects to a Single Port Pin of a
 Overdrive Mode Boosts Communication
 Low-Cost 6-Lead TSOC Surface-Mount
 Reads and Writes Over a Wide Voltage
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
www.maxim-ic.com
2/10
Partitioned Into Four Pages of 256 Bits, a
64-Bit Write-Only Secret, and Up to Five
General-Purpose Read/Write Registers
Engine
Authentication
Generate Secrets
Secret and the Capability of Computing and
Transmitting
Authorization
Protected (All or Page 0 Only) or Put in
EPROM-Emulation Mode (“Write to 0”,
Page 1)
Registration
Traceability Because No Two Parts Are Alike
Compatibility with Other 1-Wire
Products
to a Single Data Pin
Microprocessor and Communicates at Up to
15.3kbps
Speed to 125kbps
Package or Solder-Bumped UCSP™ Package
Range of 2.8V to 5.25V from -40°C to +85°C
Bits
to
Multidrop
of
Compute
Number
a
Codes
5V
160-Bit
Controller
EEPROM
Assures
(MACs)
160-Bit
ABRIDGED DATA SHEET
MAC
Absolute
Message
Memory
and
Ensures
®
Net
as
to
1 of 17
1Kb Protected 1-Wire EEPROM
PIN CONFIGURATIONS
ORDERING INFORMATION
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
Request Full Data Sheet at:
www.maxim-ic.com/fullds/DS2432
DS2432P+
DS2432P+T&R -40°C to +85°C 6 TSOC
DS2432X+
DS2432X-S+
TOP VIEW
A
B
C
REFER TO THE PACKAGE RELIABILITY REPORT FOR
IMPORTANT GUIDELINES ON QUALIFIED USAGE CONDITIONS.
PART
1
1-Wire 2
DS2432
yywwrr
###xx
GND 1
2
A1 MARK
NC 3
with SHA-1 Engine
3
-40°C to +85°C 6 TSOC
-40°C to +85°C
-40°C to +85°C
RANGE
4
TEMP
(150 mils)
TSOC
A2 = 1-WIRE
A3 = GND
ALL OTHER BUMPS: NC
yywwrr = DATE/REVISION
###xx = LOT NUMBER
(TOP VIEW WITH LASER
MARK, CONTACTS NOT
6 NC
5 NC
4 NC
VISIBLE)
PIN-
PACKAGE
8 UCSP (10k
pcs, T&R)
8 UCSP (2.5k
pcs, T&R)
UCSP
DS2432

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DS2432 Summary of contents

Page 1

... MAC as Assures Absolute Ensures ® Net ORDERING INFORMATION DS2432P+ DS2432P+T&R -40°C to +85°C 6 TSOC DS2432X+ DS2432X-S+ +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. Request Full Data Sheet at: www.maxim-ic.com/fullds/DS2432 with SHA-1 Engine GND 1-Wire ...

Page 2

... Data is transferred serially via the 1-Wire protocol, which requires only a single data lead and a ground return. The DS2432 has an additional memory area called the scratchpad that acts as a buffer when writing to the main memory, the register page or when installing a new secret ...

Page 3

... ABRIDGED DATA SHEET DS2432 BLOCK DIAGRAM Figure 1 1-Wire net Memory and SHA-1 Function Data Memory 256 bits each Register Page PARASITE POWER 1-Wire Function Control Control Unit CRC-16 Generator 4 Pages of 64 bits 64-bit Lasered ROM 512-bit Secure Hash Algorithm Engine ...

Page 4

... ABRIDGED DATA SHEET 64-BIT LASERED ROM Each DS2432 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure 3 ...

Page 5

... Register E read-only transfer-status register, used to verify data integrity with write commands. Since the scratchpad of the DS2432 is designed to accept data in blocks of eight bytes only, the lower three bits of TA1 will be forced to 0 and the lower three bits of the E/S register (Ending Offset) will always read 1. This indicates that all the data in the scratchpad will be used for a subsequent copying into main memory or secret. Bit 5 of the E/S register, called PF or “ ...

Page 6

... ABRIDGED DATA SHEET WRITING WITH VERIFICATION To write data to the DS2432, the scratchpad has to be used as intermediate storage. First the master issues the Write Scratchpad command to specify the desired target address, followed by the data to be written to the scratchpad. Note that writes to data memory must be performed on 8-byte boundaries with the 3 LSBs of the target address (T2 ...

Page 7

... All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS2432 is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section. ...

Page 8

... ABRIDGED DATA SHEET ROM FUNCTION COMMANDS Once the bus master has detected a presence, it can issue one of the seven ROM function commands that the DS2432 supports. All ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in Figure 9): Read ROM [33h] This command allows the bus master to read the DS2432’ ...

Page 9

... Command ? DS2432 TX Bit 0 Master TX Bit 0 DS2432 TX Bit 0 Master TX Bit Bit 0 Bit 0 Match ? Match ? Y DS2432 TX Bit 1 Master TX Bit 1 DS2432 TX Bit 1 Master TX Bit Bit 1 Bit 1 Match ? Match ? Y DS2432 TX Bit 63 Master TX Bit 63 DS2432 TX Bit 63 Master TX Bit Bit 63 Bit 63 Match ? ...

Page 10

... A5h 3Ch N Resume Overdrive Skip ROM ? Master TX Reset ? N Y Master TX Reset ? 69h N Overdrive Match ROM ? Master TX Bit Bit 0 Match ? Y Master TX Bit 1 N Bit 1 Match ? Y Master TX Bit 63 N Bit 63 Match ? DS2432 ...

Page 11

... Speed). The bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the pullup resistor. After detecting the rising edge on the data pin, the DS2432 waits (t , 15-60 µ ...

Page 12

... For a read data time slot “0” transmitted, the delay circuit determines how long the DS2432 will hold the data line low. If the data bit is a “1”, the DS2432 will not hold the data line low at all. ...

Page 13

... CRC is X been read without error the bus master can compute the CRC value from the first 56 bits of the 64-bit ROM and compare it to the value read from the DS2432. This 8-bit CRC is received in the true form (non-inverted) when reading the ROM. ...

Page 14

... MAX UNITS — years = -40°C to +85°C.) A MAX UNITS s 120 15 s 120 s s 15 s 15  s 1 s s s s 60 s 240 10 ms DS2432 NOTES +25°C.) NOTES 7 = +25°C.) NOTES NOTES ...

Page 15

... Recovery times shorter than those in PUP -40°C to +85°C.) A TYP MAX UNITS 16 µs 2 µs 16 µs 2 µs 2 µs 1.5 4 µs 1 µs µs µs 80 µs 6 µs 24 µ RDV = 0). RELEASE DS2432 NOTES period ...

Page 16

... RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 6 TSOC 8 UCSP PACKAGE CODE D6+1 BR823 DS2432 DOCUMENT NO. 21-0382 21-0373 ...

Page 17

... L ) (moved from the headline into the table) and PUP ). In the EEPROM table, OH changed from 1µs to 5µs (regular RECMIN changed from “TBD” to 0.3V; ILMAX © 2010 Maxim Integrated Products DS2432 PAGES CHANGED — 14, 15 ...

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