DS12CR887 Maxim, DS12CR887 Datasheet - Page 9

• Manufacturer Part Number: DS12CR887
• Description: The DS12R885 is a functional drop-in replacement for the DS12885 real-time clock (RTC)
• Manufacturer: Maxim

4–11
SO
1
2
3
RTCs with Constant-Voltage Trickle Charger
EDIP
4–11
PIN
—
—
1
DS12CR887
DS12CR887
DS12R887/
DS12R887/
ONLY
ONLY
F4, D4,
F3, D3,
F2, D2,
F1, D1
BGA
C5
—
—
AD0–AD7
V
BACKUP
RESET
RLCR
GND
MOT
V
R/W
CS
DS
X1
X2
CC
AS
NAME
AD0–
MOT
AD7
X1
X2
INTERFACE
CONTROL
CHARGER
TRICKLE
Motorola or Intel Bus Timing Selector. This pin selects one of two bus types. When
connected to V
disconnected, Intel bus timing is selected. The pin has an internal pulldown resistor.
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is
designed for operation with a crystal having a 12.5pF specified load capacitance (C
Pin X1 is the input to the oscillator and can optionally be connected to an external
32.768kHz oscillator. The output of the internal oscillator, pin X2, is left unconnected if
an external oscillator is connected to pin X1.
Multiplexed, Bidirectional Address/Data Bus. The addresses are presented during the first
portion of the bus cycle and latched into the DS12R885 by the falling edge of AS. Write
data is latched by the falling edge of DS (Motorola timing) or the rising edge of R/W (Intel
timing). In a read cycle, the DS12R885 outputs data during the latter portion of DS (DS and
R/W high for Motorola timing, DS low and R/W high for Intel timing). The read cycle is
terminated and the bus returns to a high-impedance state as DS transitions low in the case
of Motorola timing or as DS transitions high in the case of Intel timing.
POWER
OSC
AND
BUS
_____________________________________________________________________
CC
, Motorola bus timing is selected. When connected to GND or left
DIVIDE
CLOCK/CALENDAR
BY 8
UPDATE LOGIC
DS12R885
DIVIDE
BY 64
16:1 MUX
FUNCTION
CALENDAR AND ALARM
CLOCK/CALENDAR AND
REGISTERS A, B, C, D
BUFFERED CLOCK/
ALARM REGISTERS
USER RAM
114 BYTES
REGISTERS
GENERATOR
GENERATOR
Functional Diagram
SQUARE-
DIVIDE
BY 64
WAVE
IRQ
Pin Description
SQW
IRQ
L
).
9